From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:60862) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QyEfc-0006cU-Ro for qemu-devel@nongnu.org; Mon, 29 Aug 2011 23:07:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QyEfb-0004Cv-JT for qemu-devel@nongnu.org; Mon, 29 Aug 2011 23:07:24 -0400 Received: from mail-yw0-f45.google.com ([209.85.213.45]:44287) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QyEfb-0004CX-H5 for qemu-devel@nongnu.org; Mon, 29 Aug 2011 23:07:23 -0400 Received: by ywf9 with SMTP id 9so5974406ywf.4 for ; Mon, 29 Aug 2011 20:07:21 -0700 (PDT) Received: by gyd12 with SMTP id 12so6080357gyd.4 for ; Mon, 29 Aug 2011 20:07:19 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <2803ABD2-E8EA-4AE3-9AD1-21FC94DCB5BE@suse.de> References: <1314436348-28837-1-git-send-email-daniel@drv.nu> <2803ABD2-E8EA-4AE3-9AD1-21FC94DCB5BE@suse.de> Date: Mon, 29 Aug 2011 20:07:19 -0700 Message-ID: From: Daniel Verkamp Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH] ahci: add port I/O index-data pair List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Kevin Wolf , Alexander Graf On Sun, Aug 28, 2011 at 11:48 AM, Alexander Graf wrote: > > On 27.08.2011, at 04:12, Daniel Verkamp wrote: > >> Implement an I/O space index-data register pair as defined by the AHCI >> spec, including the corresponding SATA PCI capability and BAR. >> >> This allows real-mode code to access the AHCI registers; real-mode >> code cannot address the memory-mapped register space because it is >> beyond the first megabyte. > > Very nice patch! I'll check and compare with a real ICH-9 when I get > back to .de, but I'd assume you also did that already ;). Once I checked > that the IO region is set up similarly, I'll give you my ack. Please do double check against real hardware if you get the chance - I don't have a real ICH-9 handy to test against. This is all written based on my reading of the spec and testing with an internal DOS developer tool from work. I am mainly curious how the real thing handles writes to the index register that aren't divisible by 4 or are beyond the end of the register set (and how big that really is on ICH-9). Judging by the bits marked "RO" in the spec, I would guess writing 0x13 to the index and then reading it back should give 0x10, but I haven't tested it on real hw. Thanks, -- Daniel