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From: Jimmy Brisson <jimmy.brisson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "open list:MPS2" <qemu-arm@nongnu.org>,
	"open list:All patches CC here" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v1] an547: Correct typo that swaps ahb and apb peripherals
Date: Thu, 10 Feb 2022 09:13:29 -0600	[thread overview]
Message-ID: <CAH8FvQuJAkum69p6dX6mCR0kKZ7zZaM4GikcahCbsJxC3LBXsA@mail.gmail.com> (raw)
In-Reply-To: <CAFEAcA-bn0mQw5Xsn4+-b6_Qa67TViKsVK4uVmNmNkkcq5FqTw@mail.gmail.com>

On Fri, 4 Feb 2022 at 11:14, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> On Wed, 2 Feb 2022 at 15:23, Jimmy Brisson <jimmy.brisson@linaro.org> wrote:
> >
> > Turns out that this manifests in being unable to configure
> > the ethernet access permissions, as the IotKitPPC looks
> > these up by name.
> >
> > With this fix, eth is configurable
> >
> > Signed-off-by: Jimmy Brisson <jimmy.brisson@linaro.org>
>
> Can you explain the issue here in more detail, and maybe
> provide a repro case ?

Sure. I documented how I found this on my blog here:
https://theotherjimmy.github.io/blog/blog/2022-01-31-debug-qemu-eth.html
It's long, so I'll provide a quick summary here.

My reproducer is the following zephyr example:

```
west build -p auto -b mps3_an547_ns zephyr/samples/net/dhcpv4_client \
  -d build/mps3_an547_ns/net/dhcpv4_client -- \
  -DOVERLAY_CONFIG=overlay-smsc911x.conf \
  -DCONFIG_NET_QEMU_USER=y \
  -DCONFIG_BUILD_WITH_TFM=y \
  -DCOONFIG_TFM_IPC=y
```

As part of my debugging, I was using gdb on both the guest (tfm &
zephyr and host qemu).
I was able to reproduce this quickly by dumping the associated
smsc911x struct in guest gdb, and
watching the breakpoints in the `tz_ppc_read` function. Digging
through, it seems that when setting
up the peripheral access control in `iotkit_secctl_update_ppc_ap`, it
wrote the lowest 3 bits of the ap
and ignored the rest. This matches the expected behavior from the APB PPC EXT0.

Let me know if you have further questions,
Jimmy


> The AN547 document definitely thinks
> that APB PPC EXP 0 has the Memory Protection Controllers and
> AHB PPC EXP 0 has the GPIO, USB and Ethernet devices:
> https://developer.arm.com/-/media/Arm%20Developer%20Community/PDF/DAI0547B_SSE300_PLUS_U55_FPGA_for_mps3.pdf
> (tables 6-2 to 6-4 on pages 35, 36).
>
> thanks
> -- PMM


  reply	other threads:[~2022-02-10 17:04 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-02 15:23 [PATCH v1] an547: Correct typo that swaps ahb and apb peripherals Jimmy Brisson
2022-02-04 17:14 ` Peter Maydell
2022-02-10 15:13   ` Jimmy Brisson [this message]
2022-02-10 20:07     ` Jimmy Brisson

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