From: Atish Kumar Patra <atishp@rivosinc.com>
To: Weiwei Li <liweiwei@iscas.ac.cn>
Cc: "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>
Subject: Re: [PATCH v11 5/6] target/riscv: Update the privilege field for sscofpmf CSRs
Date: Wed, 27 Jul 2022 15:50:53 -0700 [thread overview]
Message-ID: <CAHBxVyF_msaV9=86QnaUY4FJkr4HATd8Cs8c2sB-QRvwavTzOA@mail.gmail.com> (raw)
In-Reply-To: <1293559b-9c4e-4162-6453-28e7c51e85a2@iscas.ac.cn>
[-- Attachment #1: Type: text/plain, Size: 8503 bytes --]
On Wed, Jul 27, 2022 at 1:27 AM Weiwei Li <liweiwei@iscas.ac.cn> wrote:
>
> 在 2022/7/27 下午2:49, Atish Patra 写道:
> > The sscofpmf extension was ratified as a part of priv spec v1.12.
> > Mark the csr_ops accordingly.
> >
> > Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> > ---
> > target/riscv/csr.c | 90 ++++++++++++++++++++++++++++++----------------
> > 1 file changed, 60 insertions(+), 30 deletions(-)
> >
> > diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> > index 57dbbf9b09a0..ec6d7f022ad5 100644
> > --- a/target/riscv/csr.c
> > +++ b/target/riscv/csr.c
> > @@ -3859,63 +3859,92 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
> > write_mhpmevent
> },
> >
> > [CSR_MHPMEVENT3H] = { "mhpmevent3h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
>
> Similar to the first commit, it's better to align with the first element
> "mhpmevent3h" .Otherwise,
>
>
Fixed it. Thanks for the review.
> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
>
> Regards,
>
> Weiwei Li
>
> > [CSR_MHPMEVENT4H] = { "mhpmevent4h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT5H] = { "mhpmevent5h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT6H] = { "mhpmevent6h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT7H] = { "mhpmevent7h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT8H] = { "mhpmevent8h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT9H] = { "mhpmevent9h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT10H] = { "mhpmevent10h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT11H] = { "mhpmevent11h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT12H] = { "mhpmevent12h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT13H] = { "mhpmevent13h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT14H] = { "mhpmevent14h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT15H] = { "mhpmevent15h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT16H] = { "mhpmevent16h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT17H] = { "mhpmevent17h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT18H] = { "mhpmevent18h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT19H] = { "mhpmevent19h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT20H] = { "mhpmevent20h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT21H] = { "mhpmevent21h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT22H] = { "mhpmevent22h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT23H] = { "mhpmevent23h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT24H] = { "mhpmevent24h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT25H] = { "mhpmevent25h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT26H] = { "mhpmevent26h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT27H] = { "mhpmevent27h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT28H] = { "mhpmevent28h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT29H] = { "mhpmevent29h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT30H] = { "mhpmevent30h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> > [CSR_MHPMEVENT31H] = { "mhpmevent31h", sscofpmf,
> read_mhpmeventh,
> > -
> write_mhpmeventh},
> > +
> write_mhpmeventh,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> >
> > [CSR_HPMCOUNTER3H] = { "hpmcounter3h", ctr32,
> read_hpmcounterh },
> > [CSR_HPMCOUNTER4H] = { "hpmcounter4h", ctr32,
> read_hpmcounterh },
> > @@ -4005,7 +4034,8 @@ riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
> >
> write_mhpmcounterh },
> > [CSR_MHPMCOUNTER31H] = { "mhpmcounter31h", mctr32,
> read_hpmcounterh,
> >
> write_mhpmcounterh },
> > - [CSR_SCOUNTOVF] = { "scountovf", sscofpmf, read_scountovf },
> > + [CSR_SCOUNTOVF] = { "scountovf", sscofpmf, read_scountovf,
> > + .min_priv_ver =
> PRIV_VERSION_1_12_0 },
> >
> > #endif /* !CONFIG_USER_ONLY */
> > };
>
>
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next prev parent reply other threads:[~2022-07-27 22:53 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-27 6:49 [PATCH v11 0/6] Improve PMU support Atish Patra
2022-07-27 6:49 ` [PATCH v11 1/6] target/riscv: Add sscofpmf extension support Atish Patra
2022-07-27 8:11 ` Weiwei Li
2022-07-27 21:32 ` Atish Kumar Patra
2022-07-31 4:10 ` Rahul Pathak
2022-07-31 4:34 ` Atish Kumar Patra
2022-07-27 6:49 ` [PATCH v11 2/6] target/riscv: Simplify counter predicate function Atish Patra
2022-07-27 8:34 ` Weiwei Li
2022-07-27 21:40 ` Atish Kumar Patra
2022-07-28 0:56 ` Weiwei Li
2022-08-02 21:02 ` Atish Kumar Patra
2022-07-27 6:49 ` [PATCH v11 3/6] target/riscv: Add few cache related PMU events Atish Patra
2022-07-27 6:49 ` [PATCH v11 4/6] hw/riscv: virt: Add PMU DT node to the device tree Atish Patra
2022-07-27 7:27 ` Sunil V L
2022-07-27 7:50 ` Atish Kumar Patra
2022-07-27 6:49 ` [PATCH v11 5/6] target/riscv: Update the privilege field for sscofpmf CSRs Atish Patra
2022-07-27 8:26 ` Weiwei Li
2022-07-27 22:50 ` Atish Kumar Patra [this message]
2022-07-27 6:49 ` [PATCH v11 6/6] target/riscv: Remove additional priv version check for mcountinhibit Atish Patra
2022-07-27 8:22 ` Weiwei Li
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