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From: Atish Kumar Patra <atishp@rivosinc.com>
To: Alistair Francis <alistair23@gmail.com>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, palmer@dabbelt.com,
	 liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com,
	bin.meng@windriver.com,  dbarboza@ventanamicro.com,
	alistair.francis@wdc.com,
	 Peter Maydell <peter.maydell@linaro.org>
Subject: Re: [PATCH] target/riscv: Add asserts for out-of-bound access
Date: Fri, 26 Jul 2024 18:35:48 -0700	[thread overview]
Message-ID: <CAHBxVyHBtnhFnFYN0=_5PoKvc7DadJABH71s+wCZzPiYAmPM_g@mail.gmail.com> (raw)
In-Reply-To: <CAKmqyKPhCzrYxwpBF+NQi-5KgcKkhWeVNX6nwwx3ZjeE9rWEAg@mail.gmail.com>

On Thu, Jul 25, 2024 at 10:12 PM Alistair Francis <alistair23@gmail.com> wrote:
>
> On Wed, Jul 24, 2024 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
> >
> > Coverity complained about the possible out-of-bounds access with
> > counter_virt/counter_virt_prev because these two arrays are
> > accessed with privilege mode. However, these two arrays are accessed
> > only when virt is enabled. Thus, the privilege mode can't be M mode.
> >
> > Add the asserts anyways to detect any wrong usage of these arrays
> > in the future.
> >
> > Suggested-by: Peter Maydell <peter.maydell@linaro.org>
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
>
> Fixes: Coverity CID 1558459
> Fixes: Coverity CID 1558462
>

I think one of the Coverity issues was about the get_field issue in
the other thread?
This doesn't necessarily fix the coverity issue also as the issue
reported is a false positive.
But I don't mind citing the coverity issues as it is reported by that.

Is there a link to both coverity issues to know which issue describes
the out-of-bound access one ?

> > ---
> > The lore discussion can be found here
> > https://lore.kernel.org/all/CAHBxVyGQHBobpf71o4Qp51iQGXKBh0Ajup=e_a95xdLF==V_WQ@mail.gmail.com/
> > ---
> >  target/riscv/pmu.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
> > index 3cc0b3648cad..e05ab067d2f2 100644
> > --- a/target/riscv/pmu.c
> > +++ b/target/riscv/pmu.c
> > @@ -204,6 +204,7 @@ static void riscv_pmu_icount_update_priv(CPURISCVState *env,
> >      }
> >
> >      if (env->virt_enabled) {
> > +        g_assert(env->priv <= PRV_S);
>
> Don't we need this assert for !env->virt_enabled as well?
>
> Alistair


  parent reply	other threads:[~2024-07-27  1:36 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-24  8:31 [PATCH] target/riscv: Add asserts for out-of-bound access Atish Patra
2024-07-26  5:11 ` Alistair Francis
2024-07-27  1:25   ` Atish Kumar Patra
2024-07-27  1:35   ` Atish Kumar Patra [this message]
2024-07-31  9:34     ` Alistair Francis
2024-07-31  9:44     ` Peter Maydell
2024-08-05  2:02 ` Alistair Francis
2024-08-05  2:05 ` Alistair Francis

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