From: Leonardo Bras Soares Passos <leobras@redhat.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Peter Xu <peterx@redhat.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Juan Quintela <quintela@redhat.com>,
qemu-devel@nongnu.org
Subject: Re: [PATCH v2 1/1] pcie: Add hotplug detect state register to cmask
Date: Mon, 10 Jul 2023 14:49:05 -0300 [thread overview]
Message-ID: <CAJ6HWG6hVBCRE3yVF-Yiu8om0YSOiu_iZHPT2KKuOiLbaYtkYw@mail.gmail.com> (raw)
In-Reply-To: <20230706155936-mutt-send-email-mst@kernel.org>
On Thu, Jul 6, 2023 at 5:00 PM Michael S. Tsirkin <mst@redhat.com> wrote:
>
> On Thu, Jul 06, 2023 at 03:02:07PM -0400, Peter Xu wrote:
> > On Thu, Jul 06, 2023 at 02:50:20PM -0400, Michael S. Tsirkin wrote:
> > > On Thu, Jul 06, 2023 at 02:14:37PM -0400, Peter Xu wrote:
> > > > On Thu, Jul 06, 2023 at 03:07:40PM -0300, Leonardo Bras Soares Passos wrote:
> > > > > > I asked the same question, and I still keep confused: whether there's a
> > > > > > first bad commit? Starting from when it fails?
> > > > > >
> > > > > > For example, is this broken on 6.0 binaries too with pc-q35-6.0?
> > > > >
> > > > > I tested for qemu 6.0, and it still reproduces, but have not pursued
> > > > > this any further.
> > > >
> > > > I see, thanks!
> > > >
> > > > But then do you know why it's never hit before? I assume it means this bug
> > > > has been there for a long time.
> > >
> > > It's a race - you have to migrate after the bit has been set before
> > > the bit got cleared.
> > > cmask is exactly for bits that qemu modifies itself.
> >
> > Michael, do you mean that Leo's patch is wrong?
>
>
> I mean his patch is exactly right. cmask was designed with this
> kind of use case in mind.
> Will queue.
Thanks Michael!
Any chance this will get in on time for v8.1 ?
>
> > I just got understood why it got cleared - I think Leo didn't mention that
> > the device was actually offlined before migration, IIUC that's why the PDS
> > bit got cleared, if PDS was trying to describe that of the slot.
> >
> > According to:
> >
> > /* Used to enable checks on load. Note that writable bits are
> > * never checked even if set in cmask. */
> > uint8_t *cmask;
> >
> > It does sound reasonable to me to have PDS cleared when device offlined.
> > Since hypervisor doesn't really know what the condition the slot presence
> > bit would be when migrating, it seems we should just clear the bit in
> > cmask.
> >
> > So with the last reply from Leo, the patch looks all right to me. It's
> > just that as Leo mentioned, we should mention the offline process if that's
> > the case, because that's definitely an important step to reproduce the issue.
> >
> > Thanks,
>
> If you want to suggest more text to the commit log, for the benefit
> of backporters, that is fine by me.
>
> > --
> > Peter Xu
>
next prev parent reply other threads:[~2023-07-10 17:50 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-06 4:55 [PATCH v2 1/1] pcie: Add hotplug detect state register to cmask Leonardo Bras
2023-07-06 7:37 ` Juan Quintela
2023-07-06 17:58 ` Leonardo Bras Soares Passos
2023-07-06 14:35 ` Peter Xu
2023-07-06 18:07 ` Leonardo Bras Soares Passos
2023-07-06 18:14 ` Peter Xu
2023-07-06 18:37 ` Leonardo Bras Soares Passos
2023-07-06 18:50 ` Michael S. Tsirkin
2023-07-06 19:02 ` Peter Xu
2023-07-06 20:00 ` Michael S. Tsirkin
2023-07-06 20:17 ` Peter Xu
2023-07-10 17:49 ` Leonardo Bras Soares Passos [this message]
2023-07-10 18:16 ` Michael S. Tsirkin
2023-07-10 21:48 ` Leonardo Bras Soares Passos
2023-07-06 21:47 ` Leonardo Bras Soares Passos
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