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Date: Sat, 9 Jun 2012 06:12:20 +0800
Message-ID: <CAJBMM-t5csSTH5WurusZsPpC3_D3hG06NHes_1wZ7spBUTLmXg@mail.gmail.com>
From: Jia Liu <proljc@gmail.com>
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Subject: Re: [Qemu-devel] [PATCH v3 08/16] target-or32: Add translation
	routines
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To: =?ISO-8859-1?Q?Andreas_F=E4rber?= <afaerber@suse.de>
Cc: Max Filippov <jcmvbkbc@gmail.com>, qemu-devel@nongnu.org

Hi Andreas,

I'll read your patch and try to catch your step.
Thank you very much for reviewing and comments, you make me open my
eyes on QEMU.

On Fri, Jun 8, 2012 at 9:31 PM, Andreas F=E4rber <afaerber@suse.de> wrote:
> Am 08.06.2012 15:28, schrieb Andreas F=E4rber:
>> Am 08.06.2012 14:56, schrieb Max Filippov:
>>> On Fri, Jun 8, 2012 at 4:00 AM, Jia Liu <proljc@gmail.com> wrote:
>>>
>>>> =A0 =A0 =A0 =A0{
>>>> =A0 =A0 =A0 =A0 =A0 =A0TCGv_i64 t0 =3D tcg_temp_new();
>>>> =A0 =A0 =A0 =A0 =A0 =A0TCGv_i64 t1 =3D tcg_temp_new();
>>>> =A0 =A0 =A0 =A0 =A0 =A0TCGv_i64 t2 =3D tcg_temp_new();
>>>> =A0 =A0 =A0 =A0 =A0 =A0tcg_gen_mul_tl(t0, cpu_R[ra], cpu_R[rb]);
>>>
>>> t0 should be _tl according to that.
>>
>> You may find these patches helpful for detecting such mismatches:
>> http://patchwork.ozlabs.org/patch/130511/
>
> http://patchwork.ozlabs.org/patch/130566/
>
>> http://patchwork.ozlabs.org/patch/130514/
>> http://patchwork.ozlabs.org/patch/130512/
>>
>> Unfortunately there was no agreement at the time on how to proceed with
>> that feature...
>>
>> Andreas
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe=
rg


Regards,
Jia.