From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38061) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UtzjP-0004Hm-FY for qemu-devel@nongnu.org; Tue, 02 Jul 2013 08:30:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UtzjM-0000ux-Iz for qemu-devel@nongnu.org; Tue, 02 Jul 2013 08:30:51 -0400 Received: from mail-vc0-x22d.google.com ([2607:f8b0:400c:c03::22d]:36470) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UtzjM-0000uj-7E for qemu-devel@nongnu.org; Tue, 02 Jul 2013 08:30:48 -0400 Received: by mail-vc0-f173.google.com with SMTP id ht10so2708088vcb.32 for ; Tue, 02 Jul 2013 05:30:47 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <51D2A905.2080708@suse.de> References: <1372756315-17437-1-git-send-email-elta.era@gmail.com> <51D2A905.2080708@suse.de> Date: Tue, 2 Jul 2013 20:30:47 +0800 Message-ID: From: Jia Liu Content-Type: multipart/alternative; boundary=089e013cb73cc4cbfd04e086830c Subject: Re: [Qemu-devel] [PATCH] target-openrisc: Add typename for CPU models. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?ISO-8859-1?Q?Andreas_F=E4rber?= Cc: Dongxue Zhang , qemu-devel --089e013cb73cc4cbfd04e086830c Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Hi Andreas, On Tue, Jul 2, 2013 at 6:18 PM, Andreas F=E4rber wrote: > > Hi Jia, > > Am 02.07.2013 11:29, schrieb Jia Liu: > > On Tue, Jul 2, 2013 at 5:11 PM, Dongxue Zhang > > wrote: > >> > >> Make target-openrisc running OK by add typename in > > openrisc_cpu_class_by_name(). > >> > >> Signed-off-by: Dongxue Zhang > > > >> --- > >> target-openrisc/cpu.c | 4 +++- > >> 1 file changed, 3 insertions(+), 1 deletion(-) > >> > >> diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c > >> index fd90d37..d38c28b 100644 > >> --- a/target-openrisc/cpu.c > >> +++ b/target-openrisc/cpu.c > >> @@ -96,12 +96,14 @@ static void openrisc_cpu_initfn(Object *obj) > >> static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model) > >> { > >> ObjectClass *oc; > >> + char *typename; > >> > >> if (cpu_model =3D=3D NULL) { > >> return NULL; > >> } > >> > >> - oc =3D object_class_by_name(cpu_model); > >> + typename =3D g_strdup_printf("%s-" TYPE_OPENRISC_CPU, cpu_model); > >> + oc =3D object_class_by_name(typename); > >> if (oc !=3D NULL && (!object_class_dynamic_cast(oc, > > TYPE_OPENRISC_CPU) || > >> object_class_is_abstract(oc))) { > >> return NULL; > > > > Thanks for your fix, it looks and test good to me. > > Sorry for the breakage. Do you want to add a > Reviewed-by/Tested-by/Acked-by? I'd queue it for you then. Thank you very much! May you please tell me how can I make a Reviewed-by/Tested-by/Acked-by? I don't know too much about it. > > If you could upload a Linux test image somewhere that may help avoid > breakages in the future. I find some Linux test images at http://qemu-project.org/Testing . How can I upload one upon to there? > > Also we reported that there was no maintainer for target-openrisc/ in > MAINTAINERS file, do you want to put yourself there so that you are > CC'ed on patches? Thank you, I'll submit a patch to add myself into MAINTAINERS file and review target-openrisc. > > Here's a pointer to the latest refactoring that partially affects or32: > http://lists.gnu.org/archive/html/qemu-devel/2013-06/msg05354.html Thank you for patching target-openrisc, I'll test it. > > Regards, > Andreas > > -- > SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany > GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg Regards, Jia --089e013cb73cc4cbfd04e086830c Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable
Hi Andreas,

On Tue, Jul 2, 2013 at 6:18 PM, Andreas= F=E4rber <afaerber@suse.de> = wrote:
>
> Hi Jia,
>
> Am 02.07.2013 11:29, schrieb= Jia Liu:
> > On Tue, Jul 2, 2013 at 5:11 PM, Dongxue Zhang <elta.era@gmail.com
> > <mailto:elta.era@gmail.com>> wrote:
&= gt; >>
> >> Make target-openrisc running OK by add typename in
> &g= t; openrisc_cpu_class_by_name().
> >>
> >> Signed-o= ff-by: Dongxue Zhang <elta.era@gma= il.com
> > <mailto:elta.era@gmail.c= om>>
> >> ---
> >> =A0target-openrisc/cpu= .c | 4 +++-
> >> =A01 file changed, 3 insertions(+), 1 deletion= (-)
> >>
> >> diff --git a/target-openrisc/cpu.c b/target-= openrisc/cpu.c
> >> index fd90d37..d38c28b 100644
> >&= gt; --- a/target-openrisc/cpu.c
> >> +++ b/target-openrisc/cpu.= c
> >> @@ -96,12 +96,14 @@ static void openrisc_cpu_initfn(Object *o= bj)
> >> =A0static ObjectClass *openrisc_cpu_class_by_name(cons= t char *cpu_model)
> >> =A0{
> >> =A0 =A0 =A0Object= Class *oc;
> >> + =A0 =A0char *typename;
> >>
> >> = =A0 =A0 =A0if (cpu_model =3D=3D NULL) {
> >> =A0 =A0 =A0 =A0 = =A0return NULL;
> >> =A0 =A0 =A0}
> >>
> >= > - =A0 =A0oc =3D object_class_by_name(cpu_model);
> >> + =A0 =A0typename =3D g_strdup_printf("%s-" TYPE_OP= ENRISC_CPU, cpu_model);
> >> + =A0 =A0oc =3D object_class_by_na= me(typename);
> >> =A0 =A0 =A0if (oc !=3D NULL && (!obj= ect_class_dynamic_cast(oc,
> > TYPE_OPENRISC_CPU) ||
> >> =A0 =A0 =A0 =A0 =A0 =A0 = =A0 =A0 =A0 =A0 =A0 =A0 object_class_is_abstract(oc))) {
> >> = =A0 =A0 =A0 =A0 =A0return NULL;
> >
> > Thanks for your f= ix, it looks and test good to me.
>
> Sorry for the breakage. Do you want to add a
> Reviewed-= by/Tested-by/Acked-by? I'd queue it for you then.

Thank you very= much! May you please tell me how can I make a Reviewed-by/Tested-by/Acked-= by? I don't know too much about it.

>
> If you could upload a Linux test image somewhere that may = help avoid
> breakages in the future.

I find some Linux test i= mages at http://qemu-project.or= g/Testing . How can I upload one upon to there?

>
> Also we reported that there was no maintainer for target-o= penrisc/ in
> MAINTAINERS file, do you want to put yourself there so = that you are
> CC'ed on patches?

Thank you, I'll submi= t a patch to add myself into MAINTAINERS file and review target-openrisc.
>
> Here's a pointer to the latest refactoring that partia= lly affects or32:
> http://lists.gnu.org/archive/html/qemu-devel/= 2013-06/msg05354.html

Thank you for patching target-openrisc, I'll test it.

>> Regards,
> Andreas
>
> --
> SUSE LINUX Produ= cts GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany
> GF: Jeff Hawn, J= ennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnberg

Regards,
Jia
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