From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34650) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wi1ux-0003yO-Kn for qemu-devel@nongnu.org; Wed, 07 May 2014 09:29:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Wi1uw-0006HI-Dt for qemu-devel@nongnu.org; Wed, 07 May 2014 09:29:51 -0400 Received: from mail-oa0-x233.google.com ([2607:f8b0:4003:c02::233]:45631) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Wi1uw-0006HA-9k for qemu-devel@nongnu.org; Wed, 07 May 2014 09:29:50 -0400 Received: by mail-oa0-f51.google.com with SMTP id n16so1200130oag.10 for ; Wed, 07 May 2014 06:29:49 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: <20140505123007.GH16173@stefanha-thinkpad.redhat.com> Date: Wed, 7 May 2014 15:29:49 +0200 Message-ID: From: Stefan Hajnoczi Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] E1000 emulation in qemu and pci configuration space List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Ayaz Akram Cc: qemu-devel On Wed, May 7, 2014 at 3:08 PM, Ayaz Akram wrote: > So, if I have rightly understood, this means whatever address range guest > wants to use, guest should write base address registers for particular > device accordingly. Yes. > Actually, I have made a hack [...] > wrote bar0 in emulated e1000's config space, but I am not able to understand > from e1000's code in qemu, that how does qemu get to know that this is going > to be the base adress for this device. Linux PCI drivers usually do not write a BAR address themselves. A key feature of PCI is autoconfiguration. That means the firmware or operating system can scan all PCI adapters and query how much BAR space they need. Then the firmware or operation system sets the BAR addresses to make the devices available. The actual device driver doesn't decide the specific BAR address, it usually just asks the kernel PCI layer to "map" a BAR that it wants to use. If you need more info, please see https://lwn.net/Kernel/LDD3/ and the PCI specification. Stefan