* [PULL v2 00/20] tcg patch queue
@ 2022-09-04 0:23 Richard Henderson
2022-09-04 0:23 ` [PULL v2 16/20] accel/tcg: Add fast path for translator_ld* Richard Henderson
2022-09-05 21:58 ` [PULL v2 00/20] tcg patch queue Stefan Hajnoczi
0 siblings, 2 replies; 4+ messages in thread
From: Richard Henderson @ 2022-09-04 0:23 UTC (permalink / raw)
To: qemu-devel
v2: Fix incorretly resolved rebase conflict in patch 16.
r~
The following changes since commit 61fd710b8da8aedcea9b4f197283dc38638e4b60:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2022-09-02 13:24:28 -0400)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20220904
for you to fetch changes up to cc64de1fdeb81bc1ab8bb6c7c24bfd4fc9b28ef2:
target/riscv: Make translator stop before the end of a page (2022-09-03 09:27:05 +0100)
----------------------------------------------------------------
Respect PROT_EXEC in user-only mode.
Fix s390x, i386 and riscv for translations crossing a page.
----------------------------------------------------------------
Ilya Leoshkevich (4):
linux-user: Clear translations on mprotect()
accel/tcg: Introduce is_same_page()
target/s390x: Make translator stop before the end of a page
target/i386: Make translator stop before the end of a page
Richard Henderson (16):
linux-user/arm: Mark the commpage executable
linux-user/hppa: Allocate page zero as a commpage
linux-user/x86_64: Allocate vsyscall page as a commpage
linux-user: Honor PT_GNU_STACK
tests/tcg/i386: Move smc_code2 to an executable section
accel/tcg: Properly implement get_page_addr_code for user-only
accel/tcg: Unlock mmap_lock after longjmp
accel/tcg: Make tb_htable_lookup static
accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c
accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp
accel/tcg: Document the faulting lookup in tb_lookup_cmp
accel/tcg: Remove translator_ldsw
accel/tcg: Add pc and host_pc params to gen_intermediate_code
accel/tcg: Add fast path for translator_ld*
target/riscv: Add MAX_INSN_LEN and insn_len
target/riscv: Make translator stop before the end of a page
include/elf.h | 1 +
include/exec/cpu-common.h | 1 +
include/exec/exec-all.h | 89 ++++++++----------------
include/exec/translator.h | 96 ++++++++++++++++---------
linux-user/arm/target_cpu.h | 4 +-
linux-user/qemu.h | 1 +
accel/tcg/cpu-exec.c | 143 ++++++++++++++++++++------------------
accel/tcg/cputlb.c | 93 +++++++------------------
accel/tcg/translate-all.c | 29 ++++----
accel/tcg/translator.c | 135 ++++++++++++++++++++++++++---------
accel/tcg/user-exec.c | 17 ++++-
linux-user/elfload.c | 82 ++++++++++++++++++++--
linux-user/mmap.c | 6 +-
softmmu/physmem.c | 12 ++++
target/alpha/translate.c | 5 +-
target/arm/translate.c | 5 +-
target/avr/translate.c | 5 +-
target/cris/translate.c | 5 +-
target/hexagon/translate.c | 6 +-
target/hppa/translate.c | 5 +-
target/i386/tcg/translate.c | 71 +++++++++++--------
target/loongarch/translate.c | 6 +-
target/m68k/translate.c | 5 +-
target/microblaze/translate.c | 5 +-
target/mips/tcg/translate.c | 5 +-
target/nios2/translate.c | 5 +-
target/openrisc/translate.c | 6 +-
target/ppc/translate.c | 5 +-
target/riscv/translate.c | 32 +++++++--
target/rx/translate.c | 5 +-
target/s390x/tcg/translate.c | 20 ++++--
target/sh4/translate.c | 5 +-
target/sparc/translate.c | 5 +-
target/tricore/translate.c | 6 +-
target/xtensa/translate.c | 6 +-
tests/tcg/i386/test-i386.c | 2 +-
tests/tcg/riscv64/noexec.c | 79 +++++++++++++++++++++
tests/tcg/s390x/noexec.c | 106 ++++++++++++++++++++++++++++
tests/tcg/x86_64/noexec.c | 75 ++++++++++++++++++++
tests/tcg/multiarch/noexec.c.inc | 139 ++++++++++++++++++++++++++++++++++++
tests/tcg/riscv64/Makefile.target | 1 +
tests/tcg/s390x/Makefile.target | 1 +
tests/tcg/x86_64/Makefile.target | 3 +-
43 files changed, 966 insertions(+), 367 deletions(-)
create mode 100644 tests/tcg/riscv64/noexec.c
create mode 100644 tests/tcg/s390x/noexec.c
create mode 100644 tests/tcg/x86_64/noexec.c
create mode 100644 tests/tcg/multiarch/noexec.c.inc
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PULL v2 16/20] accel/tcg: Add fast path for translator_ld*
2022-09-04 0:23 [PULL v2 00/20] tcg patch queue Richard Henderson
@ 2022-09-04 0:23 ` Richard Henderson
2022-09-05 21:58 ` [PULL v2 00/20] tcg patch queue Stefan Hajnoczi
1 sibling, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2022-09-04 0:23 UTC (permalink / raw)
To: qemu-devel; +Cc: Ilya Leoshkevich
Cache the translation from guest to host address, so we may
use direct loads when we hit on the primary translation page.
Look up the second translation page only once, during translation.
This obviates another lookup of the second page within tb_gen_code
after translation.
Fixes a bug in that plugin_insn_append should be passed the bytes
in the original memory order, not bswapped by pieces.
Acked-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Ilya Leoshkevich <iii@linux.ibm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/translator.h | 63 +++++++++++--------
accel/tcg/translate-all.c | 23 +++----
accel/tcg/translator.c | 126 +++++++++++++++++++++++++++++---------
3 files changed, 141 insertions(+), 71 deletions(-)
diff --git a/include/exec/translator.h b/include/exec/translator.h
index 69db0f5c21..3b77f5f4aa 100644
--- a/include/exec/translator.h
+++ b/include/exec/translator.h
@@ -81,24 +81,14 @@ typedef enum DisasJumpType {
* Architecture-agnostic disassembly context.
*/
typedef struct DisasContextBase {
- const TranslationBlock *tb;
+ TranslationBlock *tb;
target_ulong pc_first;
target_ulong pc_next;
DisasJumpType is_jmp;
int num_insns;
int max_insns;
bool singlestep_enabled;
-#ifdef CONFIG_USER_ONLY
- /*
- * Guest address of the last byte of the last protected page.
- *
- * Pages containing the translated instructions are made non-writable in
- * order to achieve consistency in case another thread is modifying the
- * code while translate_insn() fetches the instruction bytes piecemeal.
- * Such writer threads are blocked on mmap_lock() in page_unprotect().
- */
- target_ulong page_protect_end;
-#endif
+ void *host_addr[2];
} DisasContextBase;
/**
@@ -183,24 +173,43 @@ bool translator_use_goto_tb(DisasContextBase *db, target_ulong dest);
* the relevant information at translation time.
*/
-#define GEN_TRANSLATOR_LD(fullname, type, load_fn, swap_fn) \
- type fullname ## _swap(CPUArchState *env, DisasContextBase *dcbase, \
- abi_ptr pc, bool do_swap); \
- static inline type fullname(CPUArchState *env, \
- DisasContextBase *dcbase, abi_ptr pc) \
- { \
- return fullname ## _swap(env, dcbase, pc, false); \
+uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
+uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
+uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
+uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, abi_ptr pc);
+
+static inline uint16_t
+translator_lduw_swap(CPUArchState *env, DisasContextBase *db,
+ abi_ptr pc, bool do_swap)
+{
+ uint16_t ret = translator_lduw(env, db, pc);
+ if (do_swap) {
+ ret = bswap16(ret);
}
+ return ret;
+}
-#define FOR_EACH_TRANSLATOR_LD(F) \
- F(translator_ldub, uint8_t, cpu_ldub_code, /* no swap */) \
- F(translator_lduw, uint16_t, cpu_lduw_code, bswap16) \
- F(translator_ldl, uint32_t, cpu_ldl_code, bswap32) \
- F(translator_ldq, uint64_t, cpu_ldq_code, bswap64)
+static inline uint32_t
+translator_ldl_swap(CPUArchState *env, DisasContextBase *db,
+ abi_ptr pc, bool do_swap)
+{
+ uint32_t ret = translator_ldl(env, db, pc);
+ if (do_swap) {
+ ret = bswap32(ret);
+ }
+ return ret;
+}
-FOR_EACH_TRANSLATOR_LD(GEN_TRANSLATOR_LD)
-
-#undef GEN_TRANSLATOR_LD
+static inline uint64_t
+translator_ldq_swap(CPUArchState *env, DisasContextBase *db,
+ abi_ptr pc, bool do_swap)
+{
+ uint64_t ret = translator_ldq(env, db, pc);
+ if (do_swap) {
+ ret = bswap64(ret);
+ }
+ return ret;
+}
/*
* Return whether addr is on the same page as where disassembly started.
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 587886aa4e..f5e8592d4a 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1385,8 +1385,7 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
{
CPUArchState *env = cpu->env_ptr;
TranslationBlock *tb, *existing_tb;
- tb_page_addr_t phys_pc, phys_page2;
- target_ulong virt_page2;
+ tb_page_addr_t phys_pc;
tcg_insn_unit *gen_code_buf;
int gen_code_size, search_size, max_insns;
#ifdef CONFIG_PROFILER
@@ -1429,6 +1428,8 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
tb->flags = flags;
tb->cflags = cflags;
tb->trace_vcpu_dstate = *cpu->trace_dstate;
+ tb->page_addr[0] = phys_pc;
+ tb->page_addr[1] = -1;
tcg_ctx->tb_cflags = cflags;
tb_overflow:
@@ -1622,13 +1623,11 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
}
/*
- * If the TB is not associated with a physical RAM page then
- * it must be a temporary one-insn TB, and we have nothing to do
- * except fill in the page_addr[] fields. Return early before
- * attempting to link to other TBs or add to the lookup table.
+ * If the TB is not associated with a physical RAM page then it must be
+ * a temporary one-insn TB, and we have nothing left to do. Return early
+ * before attempting to link to other TBs or add to the lookup table.
*/
- if (phys_pc == -1) {
- tb->page_addr[0] = tb->page_addr[1] = -1;
+ if (tb->page_addr[0] == -1) {
return tb;
}
@@ -1639,17 +1638,11 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
*/
tcg_tb_insert(tb);
- /* check next page if needed */
- virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK;
- phys_page2 = -1;
- if ((pc & TARGET_PAGE_MASK) != virt_page2) {
- phys_page2 = get_page_addr_code(env, virt_page2);
- }
/*
* No explicit memory barrier is required -- tb_link_page() makes the
* TB visible in a consistent state.
*/
- existing_tb = tb_link_page(tb, phys_pc, phys_page2);
+ existing_tb = tb_link_page(tb, tb->page_addr[0], tb->page_addr[1]);
/* if the TB already exists, discard what we just translated */
if (unlikely(existing_tb != tb)) {
uintptr_t orig_aligned = (uintptr_t)gen_code_buf;
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c
index 3eef30d93a..ca8a5f2d83 100644
--- a/accel/tcg/translator.c
+++ b/accel/tcg/translator.c
@@ -42,15 +42,6 @@ bool translator_use_goto_tb(DisasContextBase *db, target_ulong dest)
return ((db->pc_first ^ dest) & TARGET_PAGE_MASK) == 0;
}
-static inline void translator_page_protect(DisasContextBase *dcbase,
- target_ulong pc)
-{
-#ifdef CONFIG_USER_ONLY
- dcbase->page_protect_end = pc | ~TARGET_PAGE_MASK;
- page_protect(pc);
-#endif
-}
-
void translator_loop(CPUState *cpu, TranslationBlock *tb, int max_insns,
target_ulong pc, void *host_pc,
const TranslatorOps *ops, DisasContextBase *db)
@@ -66,7 +57,12 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int max_insns,
db->num_insns = 0;
db->max_insns = max_insns;
db->singlestep_enabled = cflags & CF_SINGLE_STEP;
- translator_page_protect(db, db->pc_next);
+ db->host_addr[0] = host_pc;
+ db->host_addr[1] = NULL;
+
+#ifdef CONFIG_USER_ONLY
+ page_protect(pc);
+#endif
ops->init_disas_context(db, cpu);
tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */
@@ -151,31 +147,103 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int max_insns,
#endif
}
-static inline void translator_maybe_page_protect(DisasContextBase *dcbase,
- target_ulong pc, size_t len)
+static void *translator_access(CPUArchState *env, DisasContextBase *db,
+ target_ulong pc, size_t len)
{
-#ifdef CONFIG_USER_ONLY
- target_ulong end = pc + len - 1;
+ void *host;
+ target_ulong base, end;
+ TranslationBlock *tb;
- if (end > dcbase->page_protect_end) {
- translator_page_protect(dcbase, end);
+ tb = db->tb;
+
+ /* Use slow path if first page is MMIO. */
+ if (unlikely(tb->page_addr[0] == -1)) {
+ return NULL;
}
+
+ end = pc + len - 1;
+ if (likely(is_same_page(db, end))) {
+ host = db->host_addr[0];
+ base = db->pc_first;
+ } else {
+ host = db->host_addr[1];
+ base = TARGET_PAGE_ALIGN(db->pc_first);
+ if (host == NULL) {
+ tb->page_addr[1] =
+ get_page_addr_code_hostp(env, base, &db->host_addr[1]);
+#ifdef CONFIG_USER_ONLY
+ page_protect(end);
#endif
+ /* We cannot handle MMIO as second page. */
+ assert(tb->page_addr[1] != -1);
+ host = db->host_addr[1];
+ }
+
+ /* Use slow path when crossing pages. */
+ if (is_same_page(db, pc)) {
+ return NULL;
+ }
+ }
+
+ tcg_debug_assert(pc >= base);
+ return host + (pc - base);
}
-#define GEN_TRANSLATOR_LD(fullname, type, load_fn, swap_fn) \
- type fullname ## _swap(CPUArchState *env, DisasContextBase *dcbase, \
- abi_ptr pc, bool do_swap) \
- { \
- translator_maybe_page_protect(dcbase, pc, sizeof(type)); \
- type ret = load_fn(env, pc); \
- if (do_swap) { \
- ret = swap_fn(ret); \
- } \
- plugin_insn_append(pc, &ret, sizeof(ret)); \
- return ret; \
+uint8_t translator_ldub(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
+{
+ uint8_t ret;
+ void *p = translator_access(env, db, pc, sizeof(ret));
+
+ if (p) {
+ plugin_insn_append(pc, p, sizeof(ret));
+ return ldub_p(p);
}
+ ret = cpu_ldub_code(env, pc);
+ plugin_insn_append(pc, &ret, sizeof(ret));
+ return ret;
+}
-FOR_EACH_TRANSLATOR_LD(GEN_TRANSLATOR_LD)
+uint16_t translator_lduw(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
+{
+ uint16_t ret, plug;
+ void *p = translator_access(env, db, pc, sizeof(ret));
-#undef GEN_TRANSLATOR_LD
+ if (p) {
+ plugin_insn_append(pc, p, sizeof(ret));
+ return lduw_p(p);
+ }
+ ret = cpu_lduw_code(env, pc);
+ plug = tswap16(ret);
+ plugin_insn_append(pc, &plug, sizeof(ret));
+ return ret;
+}
+
+uint32_t translator_ldl(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
+{
+ uint32_t ret, plug;
+ void *p = translator_access(env, db, pc, sizeof(ret));
+
+ if (p) {
+ plugin_insn_append(pc, p, sizeof(ret));
+ return ldl_p(p);
+ }
+ ret = cpu_ldl_code(env, pc);
+ plug = tswap32(ret);
+ plugin_insn_append(pc, &plug, sizeof(ret));
+ return ret;
+}
+
+uint64_t translator_ldq(CPUArchState *env, DisasContextBase *db, abi_ptr pc)
+{
+ uint64_t ret, plug;
+ void *p = translator_access(env, db, pc, sizeof(ret));
+
+ if (p) {
+ plugin_insn_append(pc, p, sizeof(ret));
+ return ldq_p(p);
+ }
+ ret = cpu_ldq_code(env, pc);
+ plug = tswap64(ret);
+ plugin_insn_append(pc, &plug, sizeof(ret));
+ return ret;
+}
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PULL v2 00/20] tcg patch queue
2022-09-04 0:23 [PULL v2 00/20] tcg patch queue Richard Henderson
2022-09-04 0:23 ` [PULL v2 16/20] accel/tcg: Add fast path for translator_ld* Richard Henderson
@ 2022-09-05 21:58 ` Stefan Hajnoczi
2022-09-06 6:44 ` Richard Henderson
1 sibling, 1 reply; 4+ messages in thread
From: Stefan Hajnoczi @ 2022-09-05 21:58 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
The tsan (clang) build is broken:
https://gitlab.com/qemu-project/qemu/-/jobs/2982480773
clang-10 -m64 -mcx16 -Ilibqemu-x86_64-linux-user.fa.p -I. -I..
-Itarget/i386 -I../target/i386 -I../common-user/host/x86_64
-I../linux-user/include/host/x86_64 -I../linux-user/include
-Ilinux-user -I../linux-user -Ilinux-user/x86_64
-I../linux-user/x86_64 -Iqapi -Itrace -Iui -Iui/shader
-I/usr/include/capstone -I/usr/include/glib-2.0
-I/usr/lib/x86_64-linux-gnu/glib-2.0/include -fcolor-diagnostics -Wall
-Winvalid-pch -Werror -std=gnu11 -O2 -g -isystem
/builds/qemu-project/qemu/linux-headers -isystem linux-headers -iquote
. -iquote /builds/qemu-project/qemu -iquote
/builds/qemu-project/qemu/include -iquote
/builds/qemu-project/qemu/tcg/i386 -pthread -fsanitize=thread
-D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE
-Wstrict-prototypes -Wredundant-decls -Wundef -Wwrite-strings
-Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv
-Wold-style-definition -Wtype-limits -Wformat-security -Wformat-y2k
-Winit-self -Wignored-qualifiers -Wempty-body -Wnested-externs
-Wendif-labels -Wexpansion-to-defined -Wno-initializer-overrides
-Wno-missing-include-dirs -Wno-shift-negative-value
-Wno-string-plus-int -Wno-typedef-redefinition
-Wno-tautological-type-limit-compare -fstack-protector-strong -fPIE
-isystem../linux-headers -isystemlinux-headers -DNEED_CPU_H
'-DCONFIG_TARGET="x86_64-linux-user-config-target.h"'
'-DCONFIG_DEVICES="x86_64-linux-user-config-devices.h"' -MD -MQ
libqemu-x86_64-linux-user.fa.p/linux-user_elfload.c.o -MF
libqemu-x86_64-linux-user.fa.p/linux-user_elfload.c.o.d -o
libqemu-x86_64-linux-user.fa.p/linux-user_elfload.c.o -c
../linux-user/elfload.c
../linux-user/elfload.c:198:18: error: integer overflow in
preprocessor expression [-Werror]
#if ULONG_MAX >= TARGET_VSYSCALL_PAGE
^~~~~~~~~~~~~~~~~~~~
../target/i386/cpu.h:2386:47: note: expanded from macro 'TARGET_VSYSCALL_PAGE'
# define TARGET_VSYSCALL_PAGE (UINT64_C(-10) << 20)
~~~~~~~~~~~~~ ^ ~~
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PULL v2 00/20] tcg patch queue
2022-09-05 21:58 ` [PULL v2 00/20] tcg patch queue Stefan Hajnoczi
@ 2022-09-06 6:44 ` Richard Henderson
0 siblings, 0 replies; 4+ messages in thread
From: Richard Henderson @ 2022-09-06 6:44 UTC (permalink / raw)
To: Stefan Hajnoczi; +Cc: qemu-devel
On 9/5/22 22:58, Stefan Hajnoczi wrote:
> The tsan (clang) build is broken:
> https://gitlab.com/qemu-project/qemu/-/jobs/2982480773
>
> clang-10 -m64 -mcx16 -Ilibqemu-x86_64-linux-user.fa.p -I. -I..
> -Itarget/i386 -I../target/i386 -I../common-user/host/x86_64
> -I../linux-user/include/host/x86_64 -I../linux-user/include
> -Ilinux-user -I../linux-user -Ilinux-user/x86_64
> -I../linux-user/x86_64 -Iqapi -Itrace -Iui -Iui/shader
> -I/usr/include/capstone -I/usr/include/glib-2.0
> -I/usr/lib/x86_64-linux-gnu/glib-2.0/include -fcolor-diagnostics -Wall
> -Winvalid-pch -Werror -std=gnu11 -O2 -g -isystem
> /builds/qemu-project/qemu/linux-headers -isystem linux-headers -iquote
> . -iquote /builds/qemu-project/qemu -iquote
> /builds/qemu-project/qemu/include -iquote
> /builds/qemu-project/qemu/tcg/i386 -pthread -fsanitize=thread
> -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE
> -Wstrict-prototypes -Wredundant-decls -Wundef -Wwrite-strings
> -Wmissing-prototypes -fno-strict-aliasing -fno-common -fwrapv
> -Wold-style-definition -Wtype-limits -Wformat-security -Wformat-y2k
> -Winit-self -Wignored-qualifiers -Wempty-body -Wnested-externs
> -Wendif-labels -Wexpansion-to-defined -Wno-initializer-overrides
> -Wno-missing-include-dirs -Wno-shift-negative-value
> -Wno-string-plus-int -Wno-typedef-redefinition
> -Wno-tautological-type-limit-compare -fstack-protector-strong -fPIE
> -isystem../linux-headers -isystemlinux-headers -DNEED_CPU_H
> '-DCONFIG_TARGET="x86_64-linux-user-config-target.h"'
> '-DCONFIG_DEVICES="x86_64-linux-user-config-devices.h"' -MD -MQ
> libqemu-x86_64-linux-user.fa.p/linux-user_elfload.c.o -MF
> libqemu-x86_64-linux-user.fa.p/linux-user_elfload.c.o.d -o
> libqemu-x86_64-linux-user.fa.p/linux-user_elfload.c.o -c
> ../linux-user/elfload.c
> ../linux-user/elfload.c:198:18: error: integer overflow in
> preprocessor expression [-Werror]
> #if ULONG_MAX >= TARGET_VSYSCALL_PAGE
> ^~~~~~~~~~~~~~~~~~~~
> ../target/i386/cpu.h:2386:47: note: expanded from macro 'TARGET_VSYSCALL_PAGE'
> # define TARGET_VSYSCALL_PAGE (UINT64_C(-10) << 20)
> ~~~~~~~~~~~~~ ^ ~~
Arg! This is a compiler bug.
r~
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-09-06 6:47 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2022-09-04 0:23 [PULL v2 00/20] tcg patch queue Richard Henderson
2022-09-04 0:23 ` [PULL v2 16/20] accel/tcg: Add fast path for translator_ld* Richard Henderson
2022-09-05 21:58 ` [PULL v2 00/20] tcg patch queue Stefan Hajnoczi
2022-09-06 6:44 ` Richard Henderson
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