From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35975) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fRIyX-00069N-FK for qemu-devel@nongnu.org; Fri, 08 Jun 2018 11:06:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fRIyW-0004o7-Q2 for qemu-devel@nongnu.org; Fri, 08 Jun 2018 11:06:49 -0400 Received: from mail-wm0-x230.google.com ([2a00:1450:400c:c09::230]:51361) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fRIyW-0004nH-JE for qemu-devel@nongnu.org; Fri, 08 Jun 2018 11:06:48 -0400 Received: by mail-wm0-x230.google.com with SMTP id r15-v6so3915391wmc.1 for ; Fri, 08 Jun 2018 08:06:48 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: From: Stefan Hajnoczi Date: Fri, 8 Jun 2018 16:06:46 +0100 Message-ID: Content-Type: text/plain; charset="UTF-8" Subject: Re: [Qemu-devel] Cortex M0 emulation tasks List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Julia Suvorova , Joel Stanley Cc: =?UTF-8?Q?Steffen_G=C3=B6rtz?= , Jim Mussared , qemu-devel , Peter Maydell On Mon, May 28, 2018 at 3:26 PM, Stefan Hajnoczi wrote: > Tasks: > > D3.3 Instruction Support > D3.5.1 Alignment support Julia and I have discussed these two tasks and she will work on them. I will implement an undefined instruction test case that verifies that all undefined instructions do indeed raise the expected exception. Stefan