From: Michael Rolnik <mrolnik@gmail.com>
To: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Cc: "Thomas Huth" <thuth@redhat.com>,
"Sarah Harris" <S.E.Harris@kent.ac.uk>,
"Richard Henderson" <richard.henderson@linaro.org>,
"QEMU Developers" <qemu-devel@nongnu.org>,
"Pavel Dovgalyuk" <dovgaluk@ispras.ru>,
"Igor Mammedov" <imammedo@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: Re: [PATCH v35 01/13] target/avr: Add outward facing interfaces and core CPU logic
Date: Sun, 24 Nov 2019 00:42:28 +0200 [thread overview]
Message-ID: <CAK4993hACMt78_bs7es=awz54LzGru_rxCSEWwWi6SHpgZy33g@mail.gmail.com> (raw)
In-Reply-To: <CAL1e-=i8i6kLZX_-UNEeYTk6_uYfDM5rY_yMMnFVz1qtPU7Y8Q@mail.gmail.com>
On Fri, Nov 22, 2019 at 7:12 PM Aleksandar Markovic
<aleksandar.m.mail@gmail.com> wrote:
>
> > +
> > +static void avr_avr1_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > +}
> > +
> > +static void avr_avr2_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > +}
> > +
> > +static void avr_avr25_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > +}
> > +
> > +static void avr_avr3_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > +}
> > +
> > +static void avr_avr31_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_RAMPZ);
> > + avr_set_feature(env, AVR_FEATURE_ELPM);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > +}
> > +
> > +static void avr_avr35_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > +}
> > +
> > +static void avr_avr4_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > +}
> > +
> > +static void avr_avr5_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > +}
> > +
> > +static void avr_avr51_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_RAMPZ);
> > + avr_set_feature(env, AVR_FEATURE_ELPMX);
> > + avr_set_feature(env, AVR_FEATURE_ELPM);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > +}
> > +
> > +static void avr_avr6_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_3_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_RAMPZ);
> > + avr_set_feature(env, AVR_FEATURE_EIJMP_EICALL);
> > + avr_set_feature(env, AVR_FEATURE_ELPMX);
> > + avr_set_feature(env, AVR_FEATURE_ELPM);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > +}
> > +
> > +static void avr_xmega2_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > + avr_set_feature(env, AVR_FEATURE_RMW);
> > +}
> > +
> > +static void avr_xmega4_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_RAMPZ);
> > + avr_set_feature(env, AVR_FEATURE_ELPMX);
> > + avr_set_feature(env, AVR_FEATURE_ELPM);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > + avr_set_feature(env, AVR_FEATURE_RMW);
> > +}
> > +
> > +static void avr_xmega5_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_RAMPD);
> > + avr_set_feature(env, AVR_FEATURE_RAMPX);
> > + avr_set_feature(env, AVR_FEATURE_RAMPY);
> > + avr_set_feature(env, AVR_FEATURE_RAMPZ);
> > + avr_set_feature(env, AVR_FEATURE_ELPMX);
> > + avr_set_feature(env, AVR_FEATURE_ELPM);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > + avr_set_feature(env, AVR_FEATURE_RMW);
> > +}
> > +
> > +static void avr_xmega6_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_3_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_RAMPZ);
> > + avr_set_feature(env, AVR_FEATURE_EIJMP_EICALL);
> > + avr_set_feature(env, AVR_FEATURE_ELPMX);
> > + avr_set_feature(env, AVR_FEATURE_ELPM);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > + avr_set_feature(env, AVR_FEATURE_RMW);
> > +}
> > +
> > +static void avr_xmega7_initfn(Object *obj)
> > +{
> > + AVRCPU *cpu = AVR_CPU(obj);
> > + CPUAVRState *env = &cpu->env;
> > +
> > + avr_set_feature(env, AVR_FEATURE_LPM);
> > + avr_set_feature(env, AVR_FEATURE_IJMP_ICALL);
> > + avr_set_feature(env, AVR_FEATURE_ADIW_SBIW);
> > + avr_set_feature(env, AVR_FEATURE_SRAM);
> > + avr_set_feature(env, AVR_FEATURE_BREAK);
> > +
> > + avr_set_feature(env, AVR_FEATURE_3_BYTE_PC);
> > + avr_set_feature(env, AVR_FEATURE_2_BYTE_SP);
> > + avr_set_feature(env, AVR_FEATURE_RAMPD);
> > + avr_set_feature(env, AVR_FEATURE_RAMPX);
> > + avr_set_feature(env, AVR_FEATURE_RAMPY);
> > + avr_set_feature(env, AVR_FEATURE_RAMPZ);
> > + avr_set_feature(env, AVR_FEATURE_EIJMP_EICALL);
> > + avr_set_feature(env, AVR_FEATURE_ELPMX);
> > + avr_set_feature(env, AVR_FEATURE_ELPM);
> > + avr_set_feature(env, AVR_FEATURE_JMP_CALL);
> > + avr_set_feature(env, AVR_FEATURE_LPMX);
> > + avr_set_feature(env, AVR_FEATURE_MOVW);
> > + avr_set_feature(env, AVR_FEATURE_MUL);
> > + avr_set_feature(env, AVR_FEATURE_RMW);
> > +}
> > +
> > +typedef struct AVRCPUInfo {
> > + const char *name;
> > + void (*initfn)(Object *obj);
> > +} AVRCPUInfo;
> > +
> > +
> > +static void avr_cpu_list_entry(gpointer data, gpointer user_data)
> > +{
> > + const char *typename = object_class_get_name(OBJECT_CLASS(data));
> > +
> > + qemu_printf("%s\n", typename);
> > +}
> > +
> > +void avr_cpu_list(void)
> > +{
> > + GSList *list;
> > + list = object_class_get_list_sorted(TYPE_AVR_CPU, false);
> > + g_slist_foreach(list, avr_cpu_list_entry, NULL);
> > + g_slist_free(list);
> > +}
> > +
> > +#define DEFINE_AVR_CPU_TYPE(model, initfn) \
> > + { \
> > + .parent = TYPE_AVR_CPU, \
> > + .instance_init = initfn, \
> > + .name = model "-avr-cpu", \
> > + }
> > +
> > +static const TypeInfo avr_cpu_type_info[] = {
> > + {
> > + .name = TYPE_AVR_CPU,
> > + .parent = TYPE_CPU,
> > + .instance_size = sizeof(AVRCPU),
> > + .instance_init = avr_cpu_initfn,
> > + .class_size = sizeof(AVRCPUClass),
> > + .class_init = avr_cpu_class_init,
> > + .abstract = true,
> > + },
> > + DEFINE_AVR_CPU_TYPE("avr1", avr_avr1_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr2", avr_avr2_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr25", avr_avr25_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr3", avr_avr3_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr31", avr_avr31_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr35", avr_avr35_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr4", avr_avr4_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr5", avr_avr5_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr51", avr_avr51_initfn),
> > + DEFINE_AVR_CPU_TYPE("avr6", avr_avr6_initfn),
> > + DEFINE_AVR_CPU_TYPE("xmega2", avr_xmega2_initfn),
> > + DEFINE_AVR_CPU_TYPE("xmega4", avr_xmega4_initfn),
> > + DEFINE_AVR_CPU_TYPE("xmega5", avr_xmega5_initfn),
> > + DEFINE_AVR_CPU_TYPE("xmega6", avr_xmega6_initfn),
> > + DEFINE_AVR_CPU_TYPE("xmega7", avr_xmega7_initfn),
> > +};
> > +
>
> Hi, Michael,
>
> I have the hardest time finding in the documentation some kind of
> table of AVR CPUs containing supported features. Related to that:
>
> - Is there a list in the docs equivalent to the definitions of
> AVR_FEATURE_XXX constants in your code?
> - How did you collect all info needed for definition of 15 CPUs above
> (link to the source of info would be great)?
> - Would all 15 CPUs be supported in QEMU once this series is
> integrated, without caveats?
>
> Sincerely yours,
> Aleksandar
Hi Alexandar.
you can find this info in different source
1. this wiki https://en.wikipedia.org/wiki/Atmel_AVR_instruction_set
2. download all the speck and compare
3. GCC
1. https://gcc.gnu.org/onlinedocs/gcc/AVR-Options.html
2. https://github.com/gcc-mirror/gcc/blob/master/gcc/config/avr/avr-mcus.def
3. https://github.com/gcc-mirror/gcc/blob/master/gcc/config/avr/avr-arch.h
4. https://github.com/gcc-mirror/gcc/blob/master/gcc/config/avr/avr-devices.c
as for the flags
1. AVR_FEATURE_SRAM defined but never used
2. AVR_FEATURE_LPM assigned for all cores, however there are more
cores that do not support this instruction, so if added to QEMU will
not have it defined for them.
--
Best Regards,
Michael Rolnik
next prev parent reply other threads:[~2019-11-23 22:44 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-29 21:24 [PATCH v35 00/13] QEMU AVR 8 bit cores Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 01/13] target/avr: Add outward facing interfaces and core CPU logic Michael Rolnik
2019-11-21 18:55 ` Philippe Mathieu-Daudé
2019-11-21 19:44 ` Michael Rolnik
2019-11-21 19:53 ` Michael Rolnik
2019-11-22 7:46 ` Richard Henderson
2019-11-22 8:43 ` Aleksandar Markovic
2019-11-22 10:46 ` Philippe Mathieu-Daudé
2019-11-22 10:54 ` Michael Rolnik
2019-11-22 11:12 ` Philippe Mathieu-Daudé
2019-11-21 20:55 ` Aleksandar Markovic
2019-11-22 5:33 ` Pavel Dovgalyuk
2019-11-22 7:47 ` Richard Henderson
2019-11-22 10:40 ` Philippe Mathieu-Daudé
2019-11-22 11:04 ` Aleksandar Markovic
2019-11-22 16:58 ` Aleksandar Markovic
2019-11-22 17:11 ` Aleksandar Markovic
2019-11-23 22:42 ` Michael Rolnik [this message]
2019-11-30 16:22 ` Aleksandar Markovic
2019-11-30 17:03 ` Michael Rolnik
2019-12-01 0:50 ` Aleksandar Markovic
2019-11-22 17:28 ` Aleksandar Markovic
2019-11-23 15:58 ` Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 02/13] target/avr: Add instruction helpers Michael Rolnik
2019-11-22 11:46 ` Philippe Mathieu-Daudé
2019-10-29 21:24 ` [PATCH v35 03/13] target/avr: Add instruction decoding Michael Rolnik
2019-11-22 11:46 ` Philippe Mathieu-Daudé
2019-10-29 21:24 ` [PATCH v35 04/13] target/avr: Add instruction translation - Registers definition Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 05/13] target/avr: Add instruction translation - Arithmetic and Logic Instructions Michael Rolnik
2019-11-05 8:39 ` Aleksandar Markovic
2019-11-05 9:46 ` Aleksandar Markovic
2019-11-05 13:23 ` Richard Henderson
2019-11-05 14:37 ` Aleksandar Markovic
2019-11-19 20:09 ` Michael Rolnik
2019-11-19 21:18 ` Aleksandar Markovic
2019-11-19 21:19 ` Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 06/13] target/avr: Add instruction translation - Branch Instructions Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 07/13] target/avr: Add instruction translation - Bit and Bit-test Instructions Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 08/13] target/avr: Add instruction translation - MCU Control Instructions Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 09/13] target/avr: Add instruction translation - CPU main translation function Michael Rolnik
2019-11-22 11:48 ` Philippe Mathieu-Daudé
2019-10-29 21:24 ` [PATCH v35 10/13] target/avr: Add limited support for USART and 16 bit timer peripherals Michael Rolnik
2019-11-22 12:02 ` Philippe Mathieu-Daudé
2019-11-22 14:41 ` Aleksandar Markovic
2019-11-22 15:41 ` Philippe Mathieu-Daudé
2019-11-25 15:07 ` Sarah Harris
2019-11-25 18:22 ` Aleksandar Markovic
2019-11-22 15:10 ` Aleksandar Markovic
2019-11-25 15:57 ` Sarah Harris
2019-11-25 18:57 ` Aleksandar Markovic
2019-11-28 9:31 ` Sarah Harris
2019-11-28 10:55 ` Aleksandar Markovic
2019-11-28 11:02 ` Aleksandar Markovic
2019-11-29 9:23 ` Sarah Harris
2019-11-22 16:48 ` Aleksandar Markovic
2019-11-23 15:37 ` Michael Rolnik
2019-11-25 15:56 ` Sarah Harris
2019-11-25 18:34 ` Aleksandar Markovic
2019-12-05 18:45 ` Aleksandar Markovic
2019-12-05 19:46 ` Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 11/13] target/avr: Add example board configuration Michael Rolnik
2019-10-29 21:24 ` [PATCH v35 12/13] target/avr: Register AVR support with the rest of QEMU, the build system, and the WMAINTAINERS file Michael Rolnik
2019-11-22 12:04 ` Philippe Mathieu-Daudé
2019-11-22 13:55 ` Eric Blake
2019-11-24 1:14 ` Aleksandar Markovic
2019-10-29 21:24 ` [PATCH v35 13/13] target/avr: Add tests Michael Rolnik
2019-11-24 0:37 ` Aleksandar Markovic
2019-10-29 21:43 ` [PATCH v35 00/13] QEMU AVR 8 bit cores Aleksandar Markovic
2019-10-29 21:58 ` Michael Rolnik
2019-11-18 17:13 ` Philippe Mathieu-Daudé
2019-11-22 17:40 ` Aleksandar Markovic
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