From: Michael Rolnik <mrolnik@gmail.com>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>
Cc: Sarah Harris <S.E.Harris@kent.ac.uk>,
Richard Henderson <richard.henderson@linaro.org>,
QEMU Developers <qemu-devel@nongnu.org>,
Aleksandar Markovic <aleksandar.m.mail@gmail.com>
Subject: Re: [PATCH rc3 01/30] target/avr: Add basic parameters for new AVR platform
Date: Mon, 27 Jan 2020 10:54:26 +0200 [thread overview]
Message-ID: <CAK4993itnp5EyT8g-zGcMY6Oud9pC9GRv1Aa2dvofrH8mLWnOQ@mail.gmail.com> (raw)
In-Reply-To: <1580079311-20447-2-git-send-email-aleksandar.markovic@rt-rk.com>
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Thanks for you help guys.
On Mon, Jan 27, 2020 at 12:55 AM Aleksandar Markovic <
aleksandar.markovic@rt-rk.com> wrote:
> From: Michael Rolnik <mrolnik@gmail.com>
>
> This includes definitions of various basic parameters needed
> for integration of a new platform into QEMU.
>
> Co-developed-by: Michael Rolnik <mrolnik@gmail.com>
> Co-developed-by: Sarah Harris <S.E.Harris@kent.ac.uk>
> Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk>
> Signed-off-by: Michael Rolnik <mrolnik@gmail.com>
> Acked-by: Igor Mammedov <imammedo@redhat.com>
> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com>
> ---
> target/avr/cpu-param.h | 37 ++++++++++++++++++++++++++
> target/avr/cpu.h | 72
> ++++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 109 insertions(+)
> create mode 100644 target/avr/cpu-param.h
> create mode 100644 target/avr/cpu.h
>
> diff --git a/target/avr/cpu-param.h b/target/avr/cpu-param.h
> new file mode 100644
> index 0000000..0c29ce4
> --- /dev/null
> +++ b/target/avr/cpu-param.h
> @@ -0,0 +1,37 @@
> +/*
> + * QEMU AVR CPU
> + *
> + * Copyright (c) 2019 Michael Rolnik
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see
> + * <http://www.gnu.org/licenses/lgpl-2.1.html>
> + */
> +
> +#ifndef AVR_CPU_PARAM_H
> +#define AVR_CPU_PARAM_H
> +
> +#define TARGET_LONG_BITS 32
> +/*
> + * TARGET_PAGE_BITS cannot be more than 8 bits because
> + * 1. all IO registers occupy [0x0000 .. 0x00ff] address range, and they
> + * should be implemented as a device and not memory
> + * 2. SRAM starts at the address 0x0100
> + */
> +#define TARGET_PAGE_BITS 8
> +#define TARGET_PHYS_ADDR_SPACE_BITS 24
> +#define TARGET_VIRT_ADDR_SPACE_BITS 24
> +#define NB_MMU_MODES 2
> +
> +
> +#endif
> diff --git a/target/avr/cpu.h b/target/avr/cpu.h
> new file mode 100644
> index 0000000..d122611
> --- /dev/null
> +++ b/target/avr/cpu.h
> @@ -0,0 +1,72 @@
> +/*
> + * QEMU AVR CPU
> + *
> + * Copyright (c) 2019 Michael Rolnik
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License as published by the Free Software Foundation; either
> + * version 2.1 of the License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see
> + * <http://www.gnu.org/licenses/lgpl-2.1.html>
> + */
> +
> +#ifndef QEMU_AVR_CPU_H
> +#define QEMU_AVR_CPU_H
> +
> +#include "cpu-qom.h"
> +#include "exec/cpu-defs.h"
> +
> +#define TCG_GUEST_DEFAULT_MO 0
> +#define AVR_CPU_TYPE_SUFFIX "-" TYPE_AVR_CPU
> +#define AVR_CPU_TYPE_NAME(name) (name AVR_CPU_TYPE_SUFFIX)
> +#define CPU_RESOLVING_TYPE TYPE_AVR_CPU
> +
> +/*
> + * AVR has two memory spaces, data & code.
> + * e.g. both have 0 address
> + * ST/LD instructions access data space
> + * LPM/SPM and instruction fetching access code memory space
> + */
> +#define MMU_CODE_IDX 0
> +#define MMU_DATA_IDX 1
> +
> +#define EXCP_RESET 1
> +#define EXCP_INT(n) (EXCP_RESET + (n) + 1)
> +
> +/* Number of CPU registers */
> +#define NUMBER_OF_CPU_REGISTERS 32
> +/* Number of IO registers accessible by ld/st/in/out */
> +#define NUMBER_OF_IO_REGISTERS 64
> +
> +/*
> + * Offsets of AVR memory regions in host memory space.
> + *
> + * This is needed because the AVR has separate code and data address
> + * spaces that both have start from zero but have to go somewhere in
> + * host memory.
> + *
> + * It's also useful to know where some things are, like the IO registers.
> + */
> +/* Flash program memory */
> +#define OFFSET_CODE 0x00000000
> +/* CPU registers, IO registers, and SRAM */
> +#define OFFSET_DATA 0x00800000
> +/* CPU registers specifically, these are mapped at the start of data */
> +#define OFFSET_CPU_REGISTERS OFFSET_DATA
> +/*
> + * IO registers, including status register, stack pointer, and memory
> + * mapped peripherals, mapped just after CPU registers
> + */
> +#define OFFSET_IO_REGISTERS (OFFSET_DATA + NUMBER_OF_CPU_REGISTERS)
> +
> +#define EF_AVR_MACH 0x7F
> +
> +#endif /* !defined (QEMU_AVR_CPU_H) */
> --
> 2.7.4
>
>
--
Best Regards,
Michael Rolnik
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next prev parent reply other threads:[~2020-01-27 8:55 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-26 22:54 [PATCH rc3 00/30] target/avr merger Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 01/30] target/avr: Add basic parameters for new AVR platform Aleksandar Markovic
2020-01-27 8:54 ` Michael Rolnik [this message]
2020-01-28 13:25 ` Michael Rolnik
2020-01-28 13:49 ` Aleksandar Markovic
2020-01-28 15:10 ` Michael Rolnik
2020-01-28 18:01 ` Aleksandar Markovic
2020-01-29 7:38 ` Philippe Mathieu-Daudé
2020-01-29 10:09 ` Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 02/30] target/avr: Introduce AVR CPU class object Aleksandar Markovic
2020-01-27 2:39 ` Aleksandar Markovic
2020-01-27 8:03 ` Philippe Mathieu-Daudé
2020-01-27 8:43 ` Aleksandar Markovic
2020-01-27 8:51 ` Michael Rolnik
2020-01-29 12:20 ` Sarah Harris
2020-01-29 15:11 ` Aleksandar Markovic
2020-01-29 15:34 ` Michael Rolnik
2020-01-26 22:54 ` [PATCH rc3 03/30] target/avr: Add migration support Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 04/30] target/avr: Add GDB support Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 05/30] target/avr: Introduce AVR features Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 06/30] target/avr: Add defintions of AVR core types Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 07/30] target/avr: Add instruction helpers Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 08/30] target/avr: Add instruction translation - Registers definition Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 09/30] target/avr: Add instruction translation - Arithmetic and Logic Instructions Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 10/30] target/avr: Add instruction translation - Branch Instructions Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 11/30] target/avr: Add instruction translation - Data Transfer Instructions Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 12/30] target/avr: Add instruction translation - Bit and Bit-test Instructions Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 13/30] target/avr: Add instruction translation - MCU Control Instructions Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 14/30] target/avr: Add instruction translation - CPU main translation function Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 15/30] target/avr: Add instruction disassembly function Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 16/30] hw/char: Add limited support for Atmel USART peripheral Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 17/30] hw/timer: Add limited support for Atmel 16 bit timer peripheral Aleksandar Markovic
2020-01-26 22:54 ` [PATCH rc3 18/30] hw/misc: Add Atmel power device Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 19/30] target/avr: Add section about AVR into QEMU documentation Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 20/30] target/avr: Register AVR support with the rest of QEMU Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 21/30] target/avr: Add machine none test Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 22/30] target/avr: Update MAINTAINERS file Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 23/30] hw/core/loader: Let load_elf populate the processor-specific flags Aleksandar Markovic
2020-01-27 8:05 ` Philippe Mathieu-Daudé
2020-01-28 10:01 ` Aleksandar Markovic
2020-01-28 12:42 ` BALATON Zoltan
2020-01-28 13:27 ` Aleksandar Markovic
2020-01-28 19:25 ` Aleksandar Markovic
2020-01-29 7:32 ` Philippe Mathieu-Daudé
2020-01-29 10:02 ` Aleksandar Markovic
2020-01-29 13:56 ` Aleksandar Rikalo
2020-01-26 22:55 ` [PATCH rc3 24/30] hw/avr: Add helper to load raw/ELF firmware binaries Aleksandar Markovic
2020-01-27 7:25 ` Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 25/30] hw/avr: Add some ATmega microcontrollers Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 26/30] hw/avr: Add some Arduino boards Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 27/30] target/avr: Update build system Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 28/30] tests/boot-serial-test: Test some Arduino boards (AVR based) Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 29/30] tests/acceptance: Test the Arduino MEGA2560 board Aleksandar Markovic
2020-01-26 22:55 ` [PATCH rc3 30/30] .travis.yml: Run the AVR acceptance tests Aleksandar Markovic
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