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Thu, 20 May 2021 20:04:20 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: =?UTF-8?B?6YK55pet?= Date: Fri, 21 May 2021 11:04:07 +0800 Message-ID: Subject: Re: [PATCH] linux-user: Handle EXCP10_COPR properly for i386 To: qemu-devel@nongnu.org Content-Type: multipart/alternative; boundary="000000000000ea2b2205c2ce50d8" Received-SPF: pass client-ip=2a00:1450:4864:20::22b; envelope-from=sendtozouxu@gmail.com; helo=mail-lj1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, HTML_MESSAGE=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --000000000000ea2b2205c2ce50d8 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable ping =E9=82=B9=E6=97=AD =E4=BA=8E2021=E5=B9=B45=E6=9C=88= 14=E6=97=A5=E5=91=A8=E4=BA=94 =E4=B8=8B=E5=8D=885:23=E5=86=99=E9=81=93=EF= =BC=9A > From e805b793f7d4b3e8c37d540b7d6cc0c6ac682311 Mon Sep 17 00:00:00 2001 > From: Xu Zou > Date: Fri, 14 May 2021 15:55:07 +0800 > Subject: [PATCH] linux-user: Handle EXCP10_COPR properly for i386 > > Handle EXCP10_COPR properly for i386 in cpu loop. > > NE flag is set to select native mode for handling floating-point > exceptions. FWAIT instruction can raise EXCP10_COPR exception by using > fpu_raise_exception() function. > > The code is based on kernel's function fpu__exception_code() in > arch/x86/kernel/fpu/core.c. > > Signed-off-by: Xu Zou > --- > linux-user/i386/cpu_loop.c | 26 +++++++++++++++++++++++++- > 1 file changed, 25 insertions(+), 1 deletion(-) > > diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c > index f813e87294..e1f2911554 100644 > --- a/linux-user/i386/cpu_loop.c > +++ b/linux-user/i386/cpu_loop.c > @@ -199,6 +199,8 @@ void cpu_loop(CPUX86State *env) > { > CPUState *cs =3D env_cpu(env); > int trapnr; > + int si_code; > + uint8_t status; > abi_ulong pc; > abi_ulong ret; > > @@ -315,6 +317,28 @@ void cpu_loop(CPUX86State *env) > case EXCP_ATOMIC: > cpu_exec_step_atomic(cs); > break; > + case EXCP10_COPR: > + si_code =3D 0; > + status =3D env->fp_status.float_exception_flags; > + if (status & float_flag_invalid) { > + si_code =3D TARGET_FPE_FLTINV; > + } > + if (status & float_flag_divbyzero) { > + si_code =3D TARGET_FPE_FLTDIV; > + } > + if (status & float_flag_overflow) { > + si_code =3D TARGET_FPE_FLTOVF; > + } > + if ((status & float_flag_underflow) || > + (status & float_flag_input_denormal) || > + (status & float_flag_output_denormal)) { > + si_code =3D TARGET_FPE_FLTUND; > + } > + if (status & float_flag_inexact) { > + si_code =3D TARGET_FPE_FLTRES; > + } > + gen_signal(env, TARGET_SIGFPE, si_code, env->eip); > + break; > default: > pc =3D env->segs[R_CS].base + env->eip; > EXCP_DUMP(env, "qemu: 0x%08lx: unhandled CPU exception 0x%x = - > aborting\n", > @@ -327,7 +351,7 @@ void cpu_loop(CPUX86State *env) > > void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs= ) > { > - env->cr[0] =3D CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK; > + env->cr[0] =3D CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK | CR0_NE_MASK= ; > env->hflags |=3D HF_PE_MASK | HF_CPL_MASK; > if (env->features[FEAT_1_EDX] & CPUID_SSE) { > env->cr[4] |=3D CR4_OSFXSR_MASK; > -- > 2.25.1 > > --000000000000ea2b2205c2ce50d8 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
ping

=E9=82=B9=E6=97=AD <sendtozouxu@gmail.com> =E4=BA=8E2021=E5=B9=B45=E6=9C=8814= =E6=97=A5=E5=91=A8=E4=BA=94 =E4=B8=8B=E5=8D=885:23=E5=86=99=E9=81=93=EF=BC= =9A
From e805b793f7d4b3e8c37d540b7d6cc0c6ac682311 Mon Sep 17 00:00:00 2001=
From: Xu Zou <sendtozouxu@gmail.com>
Date: Fri, 14 May 2021 15:55:07 +0800=
Subject: [PATCH] linux-user: Handle EXCP10_COPR properly for i386
Handle EXCP10_COPR properly for i386 in cpu loop.

NE flag is set t= o select native mode for handling floating-point
exceptions. FWAIT instr= uction can raise EXCP10_COPR exception by using
fpu_raise_exception() fu= nction.

The code is based on kernel's function fpu__exception_co= de() in
arch/x86/kernel/fpu/core.c.

Signed-off-by: Xu Zou <sendtozouxu@gmail.c= om>
---
=C2=A0linux-user/i386/cpu_loop.c | 26 ++++++++++++++++= +++++++++-
=C2=A01 file changed, 25 insertions(+), 1 deletion(-)

= diff --git a/linux-user/i386/cpu_loop.c b/linux-user/i386/cpu_loop.c
ind= ex f813e87294..e1f2911554 100644
--- a/linux-user/i386/cpu_loop.c
+++= b/linux-user/i386/cpu_loop.c
@@ -199,6 +199,8 @@ void cpu_loop(CPUX86St= ate *env)
=C2=A0{
=C2=A0 =C2=A0 =C2=A0CPUState *cs =3D env_cpu(env);<= br>=C2=A0 =C2=A0 =C2=A0int trapnr;
+ =C2=A0 =C2=A0int si_code;
+ =C2= =A0 =C2=A0uint8_t status;
=C2=A0 =C2=A0 =C2=A0abi_ulong pc;
=C2=A0 = =C2=A0 =C2=A0abi_ulong ret;
=C2=A0
@@ -315,6 +317,28 @@ void cpu_loop= (CPUX86State *env)
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0case EXCP_ATOMIC:=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0cpu_exec_step_atomic(cs);=
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
+ =C2=A0 =C2= =A0 =C2=A0 =C2=A0case EXCP10_COPR:
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0si_code =3D 0;
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0status = =3D env->fp_status.float_exception_flags;
+ =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0if (status & float_flag_invalid) {
+ =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0si_code =3D TARGET_FPE_FLTINV;
= + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+ =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0if (status & float_flag_divbyzero) {
+ =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0si_code =3D TARGET_FPE_FLTDIV;=
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+ =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0if (status & float_flag_overflow) {
+ =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0si_code =3D TARGET_FPE_FLTOVF;=
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+ =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0if ((status & float_flag_underflow) ||
+ =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(status & float_flag_in= put_denormal) ||
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0(status & float_flag_output_denormal)) {
+ =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0si_code =3D TARGET_FPE_FLTUND;
+ =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0if (status & float_flag_inexact) {
+ =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0si_code =3D TARGET_FPE_FLTRES;
+ = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}
+ =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0gen_signal(env, TARGET_SIGFPE, si_code, env->eip);
+ = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0break;
=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0default:
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0pc = =3D env->segs[R_CS].base + env->eip;
=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0EXCP_DUMP(env, "qemu: 0x%08lx: unhandled CPU excep= tion 0x%x - aborting\n",
@@ -327,7 +351,7 @@ void cpu_loop(CPUX86St= ate *env)
=C2=A0
=C2=A0void target_cpu_copy_regs(CPUArchState *env, s= truct target_pt_regs *regs)
=C2=A0{
- =C2=A0 =C2=A0env->cr[0] =3D = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
+ =C2=A0 =C2=A0env->cr[0] = =3D CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK | CR0_NE_MASK;
=C2=A0 =C2=A0= =C2=A0env->hflags |=3D HF_PE_MASK | HF_CPL_MASK;
=C2=A0 =C2=A0 =C2= =A0if (env->features[FEAT_1_EDX] & CPUID_SSE) {
=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0env->cr[4] |=3D CR4_OSFXSR_MASK;
--
2.25.1
--000000000000ea2b2205c2ce50d8--