From: Anup Patel <apatel@ventanamicro.com>
To: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Atish Patra <atishp@atishpatra.org>,
Richard Henderson <richard.henderson@linaro.org>,
Anup Patel <anup@brainfault.org>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Peter Maydell <peter.maydell@linaro.org>,
Sagar Karandikar <sagark@eecs.berkeley.edu>
Subject: Re: [PATCH v2 0/5] Nested virtualization fixes for QEMU
Date: Mon, 21 Nov 2022 08:31:47 +0530 [thread overview]
Message-ID: <CAK9=C2WPJRmQ31h3EvEm-JHX8MtrgZFwOyx20Dp88HCbeLkPMw@mail.gmail.com> (raw)
In-Reply-To: <20221108125703.1463577-1-apatel@ventanamicro.com>
Hi Alistair,
On Tue, Nov 8, 2022 at 6:27 PM Anup Patel <apatel@ventanamicro.com> wrote:
>
> This series mainly includes fixes discovered while developing nested
> virtualization running on QEMU.
>
> These patches can also be found in the riscv_nested_fixes_v2 branch at:
> https://github.com/avpatel/qemu.git
>
> Changes since v1:
> - Added Alistair's Reviewed-by tags to appropriate patches
> - Added detailed comment block in PATCH4
>
> Anup Patel (5):
> target/riscv: Typo fix in sstc() predicate
> target/riscv: Update VS timer whenever htimedelta changes
> target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP
> target/riscv: No need to re-start QEMU timer when timecmp ==
> UINT64_MAX
> target/riscv: Ensure opcode is saved for all relevant instructions
Friendly ping ?
Regards,
Anup
>
> target/riscv/cpu_helper.c | 2 --
> target/riscv/csr.c | 18 ++++++++++-
> target/riscv/insn_trans/trans_rva.c.inc | 10 ++++--
> target/riscv/insn_trans/trans_rvd.c.inc | 2 ++
> target/riscv/insn_trans/trans_rvf.c.inc | 2 ++
> target/riscv/insn_trans/trans_rvh.c.inc | 3 ++
> target/riscv/insn_trans/trans_rvi.c.inc | 2 ++
> target/riscv/insn_trans/trans_rvzfh.c.inc | 2 ++
> target/riscv/insn_trans/trans_svinval.c.inc | 3 ++
> target/riscv/time_helper.c | 36 ++++++++++++++++++---
> 10 files changed, 70 insertions(+), 10 deletions(-)
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-11-21 3:03 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-08 12:56 [PATCH v2 0/5] Nested virtualization fixes for QEMU Anup Patel
2022-11-08 12:56 ` [PATCH v2 1/5] target/riscv: Typo fix in sstc() predicate Anup Patel
2022-11-08 12:57 ` [PATCH v2 2/5] target/riscv: Update VS timer whenever htimedelta changes Anup Patel
2022-12-08 3:29 ` Alistair Francis
2022-12-08 8:41 ` Anup Patel
2022-12-12 5:53 ` Alistair Francis
2022-12-12 11:12 ` Anup Patel
2022-12-15 3:25 ` Alistair Francis
2022-12-23 13:14 ` Anup Patel
2022-12-28 5:38 ` Alistair Francis
2023-01-03 16:13 ` Anup Patel
2023-01-16 5:20 ` Anup Patel
2023-01-19 2:05 ` Alistair Francis
2022-11-08 12:57 ` [PATCH v2 3/5] target/riscv: Don't clear mask in riscv_cpu_update_mip() for VSTIP Anup Patel
2022-11-08 12:57 ` [PATCH v2 4/5] target/riscv: No need to re-start QEMU timer when timecmp == UINT64_MAX Anup Patel
2022-11-08 12:57 ` [PATCH v2 5/5] target/riscv: Ensure opcode is saved for all relevant instructions Anup Patel
2022-11-21 7:23 ` Alistair Francis
2022-11-21 3:01 ` Anup Patel [this message]
2022-11-22 1:03 ` [PATCH v2 0/5] Nested virtualization fixes for QEMU Alistair Francis
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