From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:44558) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QtpYo-0004r0-6j for qemu-devel@nongnu.org; Wed, 17 Aug 2011 19:30:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QtpYm-0005FM-7a for qemu-devel@nongnu.org; Wed, 17 Aug 2011 19:30:10 -0400 Received: from mail-fx0-f45.google.com ([209.85.161.45]:63011) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QtpYl-0005F3-U5 for qemu-devel@nongnu.org; Wed, 17 Aug 2011 19:30:08 -0400 Received: by fxbb27 with SMTP id b27so1124958fxb.4 for ; Wed, 17 Aug 2011 16:30:07 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <4E4C4215.10704@codemonkey.ws> References: <1313614076-28878-1-git-send-email-blanham@gmail.com> <4E4C4215.10704@codemonkey.ws> Date: Wed, 17 Aug 2011 18:30:06 -0500 Message-ID: From: Bryce Lanham Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [RFC][PATCH 000/111] QEMU m68k core additions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-devel@nongnu.org Ugh, I'm sorry about that. This is why I should test before using unfamiliar tools. Someone suggested using git format-patch/git send-email instead of a big patch. Apologies, Bryce Lanham On Wed, Aug 17, 2011 at 5:35 PM, Anthony Liguori wr= ote: > On 08/17/2011 03:46 PM, Bryce Lanham wrote: >> >> These patches greatly expand Motorola 68k emulation within qemu, and are >> what I used as a basis for my >> Google Summer of Code project to add NeXT hardware support to QEMU. > > Please don't crap flood the list with a series of 100 patches. > > Split things into logical chunks such that a series can be reasonably > reviewed and applied. > > Regards, > > Anthony Liguori > >> >> Bryce Lanham >> >> Alexander Paramonov (1): >> =A0 linux-user: Signals processing is not thread-safe. >> >> Andreas Schwab (3): >> =A0 m68k: add cas >> =A0 m68k: define fcntl constants >> =A0 m68k: add DBcc instruction. >> >> Laurent Vivier (106): >> =A0 linux-user: add qemu-wrapper >> =A0 linux-user: define default cpu model in configure instead of >> =A0 =A0 linux-user/main.c >> =A0 linux-user: specify the cpu model during configure >> =A0 linux-user,m68k: display default cpu >> =A0 linux-user: define new environment variables >> =A0 linux-user: define a script to set binfmt using debian flavored tool= s >> =A0 linux-user: define default cpu model in configure instead of >> =A0 =A0 linux-user/main.c >> =A0 m68k: add tcg_gen_debug_insn_start() >> =A0 m68k: define m680x0 CPUs and features >> =A0 m68k: add missing accessing modes for some instructions. >> =A0 m68k: add Motorola 680x0 family common instructions. >> =A0 m68k: add Scc instruction with memory operand. >> =A0 m68k: add DBcc instruction. >> =A0 m68k: modify movem instruction to manage word >> =A0 m68k: add 64bit divide. >> =A0 m68k: add 32bit and 64bit multiply >> =A0 m68k: add word data size for suba/adda >> =A0 m68k: add fpu >> =A0 m68k: add "byte", "word" and memory shift >> =A0 m68k: add "byte", "word" and memory rotate. >> =A0 m68k: add bitfield_mem, bitfield_reg >> =A0 m68k: add variable offset/width to bitfield_reg/bitfield_mem >> =A0 m68k: add cas >> =A0 m68k: allow fpu to manage double data type. >> =A0 m68k: allow fpu to manage double data type with fmove to >> =A0 m68k: add FScc instruction >> =A0 m68k: add single data type to gen_ea >> =A0 m68k: add linkl instruction >> =A0 m68k: Add fmovecr >> =A0 m68k: correct typo on f64_to_i32() return type. >> =A0 m68k: improve CC_OP_LOGIC >> =A0 m68k: correct neg condition code flags computation >> =A0 Correct invalid use of "const void *" with "const uint8_t *" >> =A0 m68k: add EA support for negx >> =A0 m68k: add abcd instruction >> =A0 m68k: add sbcd instruction >> =A0 mm68k: add nbcd instruction >> =A0 m68k: set X flag according size of operand =A0 =A0 Set X flag correc= tly >> =A0 =A0 for addsub, arith_im, addsubq. >> =A0 m68k: on 0 bit shift, don't update X flag >> =A0 m68k: improve addx instructions =A0 =A0 Add (byte, word) opsize =A0 = =A0 Add >> =A0 =A0 memory access >> =A0 m68k: improve subx,negx instructions =A0 =A0 Add (byte, word) opsize >> =A0 =A0 Add memory access (subx) >> =A0 m68k: improve asl/asr =A0 =A0 evaluate correclty the missing V flag >> =A0 m68k: use read_imm1() when it is possible >> =A0 m68k: correct shift side effect for roxrl and roxll >> =A0 m68k: asl/asr, clear C flag if shift count is 0 >> =A0 m68k: lsl/lsr, clear C flag if shift count is 0 >> =A0 m68k: correct divs.w and divu.w >> =A0 m68k: correct flags with negl >> =A0 m68k: for bitfield opcodes, correct operands corruption >> =A0 m68k: Correct bfclr in register case. >> =A0 m68k-linux-user: add '--enable-emulop' >> =A0 m68k: correctly compute divsl >> =A0 m68k: correctly compute divul >> =A0 m68k: add m68030 definition >> =A0 m68k: remove dead code >> =A0 m68k: remove useless file m68k-qreg.h >> =A0 m68k: FPU rework (draft) >> =A0 m68k: some FPU debugging macros >> =A0 m68k: more tests >> =A0 m68k: correct compute gen_bitfield_cc() >> =A0 m68k: add fgetexp >> =A0 m68k: add fscale >> =A0 m68k: correct addsubq >> =A0 m68k: add fetox and flogn >> =A0 m68k: initialize FRegs, define pickNaN() >> =A0 m68k: correct cmpa comparison datatype >> =A0 m68k: add flog10 >> =A0 m68k: add cmpm instruction >> =A0 m68k: add ftwotox instruction >> =A0 m68k: better fpu traces >> =A0 m68k: register source operand is always in extended size >> =A0 m68k: add facos instruction >> =A0 m68k: add ftan instruction >> =A0 m68k: add fsin instruction >> =A0 m68k: add fcos instruction >> =A0 m68k: correct fpcr update >> =A0 m68k: add fmod instruction >> =A0 m68k: flush flags before negx instruction. >> =A0 m68k: correct fmovemx FP registers order. >> =A0 m68k: add fatan instruction >> =A0 m68k: correct bfins instruction >> =A0 m68k: fcmp correctly compares infinity. >> =A0 m68k: allows bfins to manage correctly width =3D 32 >> =A0 m68k: add ftentox instruction >> =A0 m68k: correctly define and manage NaN >> =A0 m68k: don't call gdb_register_coprocessor() twice. >> =A0 m68k: gdb FP registers are 96 bits >> =A0 m68k: add exg instruction >> =A0 m68k: define floatx80_default_inf_high and floatx80_default_inf_low >> =A0 m68k: add bkpt instruction >> =A0 m68k: correctly convert floatx80<->long double >> =A0 m68k: use expl() to compute exp_FP0() >> =A0 m68k: use exp2l() to compute exp2_FP0() >> =A0 m68k: use logl() to compute ln_FP0() >> =A0 m68k: use log10l() to compute log10_FP0() >> =A0 m68k: correctly load signed word into floating point register >> =A0 m68k: add fcosh instruction >> =A0 m68k: add fasin instruction >> =A0 m68k: add fsincos instruction >> =A0 m68k: add fsinh instruction >> =A0 m68k: add ftanh instruction >> =A0 m68k: add flognp1 instruction >> =A0 m68k: add fatanh instruction >> =A0 m68k: first draft of q800 emulation (not working) >> =A0 m68k: add movec instruction >> =A0 m68k: move from sr can use effective addresse on m68k >> >> Peter Bj=F8rn J=F8rgensen (1): >> =A0 m68k: Added ULL to 64 bit integer in helper.c >> >> > >