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From: Alistair Francis <alistair23@gmail.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
	Bin Meng <bin.meng@windriver.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Jim Wilson <jimw@sifive.com>
Subject: Re: [PATCH 1/4] target/riscv: Make csr_ops[CSR_TABLE_SIZE] external
Date: Fri, 15 Jan 2021 13:49:17 -0800	[thread overview]
Message-ID: <CAKmqyKM24487iky0-ESmbakpPT28fAGhERCUO7935ub0ZRJ-KA@mail.gmail.com> (raw)
In-Reply-To: <1610427124-49887-2-git-send-email-bmeng.cn@gmail.com>

On Mon, Jan 11, 2021 at 8:53 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> In preparation to generate the CSR register list for GDB stub
> dynamically, change csr_ops[] to non-static so that it can be
> referenced externally.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>
>  target/riscv/cpu.h |  8 ++++++++
>  target/riscv/csr.c | 10 +---------
>  2 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> index 2649949..6f9e1cc 100644
> --- a/target/riscv/cpu.h
> +++ b/target/riscv/cpu.h
> @@ -482,6 +482,14 @@ typedef struct {
>      riscv_csr_op_fn op;
>  } riscv_csr_operations;
>
> +/* CSR function table constants */
> +enum {
> +    CSR_TABLE_SIZE = 0x1000
> +};
> +
> +/* CSR function table */
> +extern riscv_csr_operations csr_ops[];
> +
>  void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops);
>  void riscv_set_csr_ops(int csrno, riscv_csr_operations *ops);
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 10ab82e..507e8ee 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -23,14 +23,6 @@
>  #include "qemu/main-loop.h"
>  #include "exec/exec-all.h"
>
> -/* CSR function table */
> -static riscv_csr_operations csr_ops[];
> -
> -/* CSR function table constants */
> -enum {
> -    CSR_TABLE_SIZE = 0x1000
> -};
> -
>  /* CSR function table public API */
>  void riscv_get_csr_ops(int csrno, riscv_csr_operations *ops)
>  {
> @@ -1378,7 +1370,7 @@ int riscv_csrrw_debug(CPURISCVState *env, int csrno, target_ulong *ret_value,
>  }
>
>  /* Control and Status Register function table */
> -static riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
> +riscv_csr_operations csr_ops[CSR_TABLE_SIZE] = {
>      /* User Floating-Point CSRs */
>      [CSR_FFLAGS] =              { fs,   read_fflags,      write_fflags      },
>      [CSR_FRM] =                 { fs,   read_frm,         write_frm         },
> --
> 2.7.4
>
>


  reply	other threads:[~2021-01-15 21:52 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-12  4:52 [PATCH 0/4] target/riscv: Generate the GDB XML file for CSR registers dynamically Bin Meng
2021-01-12  4:52 ` [PATCH 1/4] target/riscv: Make csr_ops[CSR_TABLE_SIZE] external Bin Meng
2021-01-15 21:49   ` Alistair Francis [this message]
2021-01-18 17:55   ` Richard Henderson
2021-01-19  2:41     ` Bin Meng
2021-01-12  4:52 ` [PATCH 2/4] target/riscv: Add CSR name in the CSR function table Bin Meng
2021-01-15 13:14   ` Alexander Richardson
2021-01-15 13:43     ` Bin Meng
2021-01-15 21:53     ` Alistair Francis
2021-01-15 21:51   ` Alistair Francis
2021-01-12  4:52 ` [PATCH 3/4] target/riscv: Generate the GDB XML file for CSR registers dynamically Bin Meng
2021-01-15 21:59   ` Alistair Francis
2021-01-15 22:07     ` Alistair Francis
2021-01-16  1:36       ` Bin Meng
2021-01-12  4:52 ` [PATCH 4/4] target/riscv: Remove built-in GDB XML files for CSRs Bin Meng
2021-01-15 22:00   ` Alistair Francis

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