Re: [PATCH v2] hw/riscv/riscv-iommu: Use standard EN_PRI bit for PRI

[Alistair Francis <alistair23@gmail.com>]

On Wed, Mar 25, 2026 at 11:49 AM Jay Chang <jay.chang@sifive.com> wrote:
>
> Replace the temporary custom extension bit (TC[32]) with the
> standard EN_PRI bit defined in RISC-V IOMMU specification.
>
> Signed-off-by: Jay Chang <jay.chang@sifive.com>
> Reviewed-by: Frank Chang <frank.chang@sifive.com>
> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>
>
> Change in V2:
>   Align code
>
> Signed-off-by: Jay Chang <jay.chang@sifive.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  hw/riscv/riscv-iommu.c | 7 ++-----
>  1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
> index 225394ea83..30343e98d0 100644
> --- a/hw/riscv/riscv-iommu.c
> +++ b/hw/riscv/riscv-iommu.c
> @@ -1572,11 +1572,8 @@ static int riscv_iommu_translate(RISCVIOMMUState *s, RISCVIOMMUContext *ctx,
>      riscv_iommu_hpm_incr_ctr(s, ctx, RISCV_IOMMU_HPMEVENT_URQ);
>
>      iot_cache = g_hash_table_ref(s->iot_cache);
> -    /*
> -     * TC[32] is reserved for custom extensions, used here to temporarily
> -     * enable automatic page-request generation for ATS queries.
> -     */
> -    enable_pri = (iotlb->perm == IOMMU_NONE) && (ctx->tc & BIT_ULL(32));
> +    enable_pri = (iotlb->perm == IOMMU_NONE) &&
> +                 (ctx->tc & RISCV_IOMMU_DC_TC_EN_PRI);
>      enable_pid = (ctx->tc & RISCV_IOMMU_DC_TC_PDTV);
>
>      /* Check for ATS request. */
> --
> 2.48.1
>
>