From: Alistair Francis <alistair23@gmail.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
alistair.francis@wdc.com, Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>
Subject: Re: [PATCH v5 10/11] hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()
Date: Wed, 11 Jan 2023 08:42:50 +1000 [thread overview]
Message-ID: <CAKmqyKMHtXu8D575s6c=4VCe+POMSDnxvxS2aWjjSb_R368ucg@mail.gmail.com> (raw)
In-Reply-To: <20230102115241.25733-11-dbarboza@ventanamicro.com>
On Mon, Jan 2, 2023 at 9:55 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> The microchip_icicle_kit, sifive_u, spike and virt boards are now doing
> the same steps when '-kernel' is used:
>
> - execute load_kernel()
> - load init_rd()
> - write kernel_cmdline
>
> Let's fold everything inside riscv_load_kernel() to avoid code
> repetition. To not change the behavior of boards that aren't calling
> riscv_load_init(), add an 'load_initrd' flag to riscv_load_kernel() and
> allow these boards to opt out from initrd loading.
>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/boot.c | 22 +++++++++++++++++++---
> hw/riscv/microchip_pfsoc.c | 12 ++----------
> hw/riscv/opentitan.c | 2 +-
> hw/riscv/sifive_e.c | 3 ++-
> hw/riscv/sifive_u.c | 12 ++----------
> hw/riscv/spike.c | 11 +----------
> hw/riscv/virt.c | 12 ++----------
> include/hw/riscv/boot.h | 1 +
> 8 files changed, 30 insertions(+), 45 deletions(-)
>
> diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
> index 2594276223..4888d5c1e0 100644
> --- a/hw/riscv/boot.c
> +++ b/hw/riscv/boot.c
> @@ -175,10 +175,12 @@ target_ulong riscv_load_firmware(const char *firmware_filename,
>
> target_ulong riscv_load_kernel(MachineState *machine,
> target_ulong kernel_start_addr,
> + bool load_initrd,
> symbol_fn_t sym_cb)
> {
> const char *kernel_filename = machine->kernel_filename;
> uint64_t kernel_load_base, kernel_entry;
> + void *fdt = machine->fdt;
>
> g_assert(kernel_filename != NULL);
>
> @@ -192,21 +194,35 @@ target_ulong riscv_load_kernel(MachineState *machine,
> if (load_elf_ram_sym(kernel_filename, NULL, NULL, NULL,
> NULL, &kernel_load_base, NULL, NULL, 0,
> EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
> - return kernel_load_base;
> + kernel_entry = kernel_load_base;
> + goto out;
> }
>
> if (load_uimage_as(kernel_filename, &kernel_entry, NULL, NULL,
> NULL, NULL, NULL) > 0) {
> - return kernel_entry;
> + goto out;
> }
>
> if (load_image_targphys_as(kernel_filename, kernel_start_addr,
> current_machine->ram_size, NULL) > 0) {
> - return kernel_start_addr;
> + kernel_entry = kernel_start_addr;
> + goto out;
> }
>
> error_report("could not load kernel '%s'", kernel_filename);
> exit(1);
> +
> +out:
> + if (load_initrd && machine->initrd_filename) {
> + riscv_load_initrd(machine, kernel_entry);
> + }
> +
> + if (fdt && machine->kernel_cmdline && *machine->kernel_cmdline) {
> + qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
> + machine->kernel_cmdline);
> + }
> +
> + return kernel_entry;
> }
>
> void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry)
> diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
> index 82ae5e7023..c45023a2b1 100644
> --- a/hw/riscv/microchip_pfsoc.c
> +++ b/hw/riscv/microchip_pfsoc.c
> @@ -629,16 +629,8 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
> kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc.u_cpus,
> firmware_end_addr);
>
> - kernel_entry = riscv_load_kernel(machine, kernel_start_addr, NULL);
> -
> - if (machine->initrd_filename) {
> - riscv_load_initrd(machine, kernel_entry);
> - }
> -
> - if (machine->kernel_cmdline && *machine->kernel_cmdline) {
> - qemu_fdt_setprop_string(machine->fdt, "/chosen",
> - "bootargs", machine->kernel_cmdline);
> - }
> + kernel_entry = riscv_load_kernel(machine, kernel_start_addr,
> + true, NULL);
>
> /* Compute the fdt load address in dram */
> fdt_load_addr = riscv_load_fdt(memmap[MICROCHIP_PFSOC_DRAM_LO].base,
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index 64d5d435b9..f6fd9725a5 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -101,7 +101,7 @@ static void opentitan_board_init(MachineState *machine)
> }
>
> if (machine->kernel_filename) {
> - riscv_load_kernel(machine, memmap[IBEX_DEV_RAM].base, NULL);
> + riscv_load_kernel(machine, memmap[IBEX_DEV_RAM].base, false, NULL);
> }
> }
>
> diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
> index 3e3f4b0088..6835d1c807 100644
> --- a/hw/riscv/sifive_e.c
> +++ b/hw/riscv/sifive_e.c
> @@ -114,7 +114,8 @@ static void sifive_e_machine_init(MachineState *machine)
> memmap[SIFIVE_E_DEV_MROM].base, &address_space_memory);
>
> if (machine->kernel_filename) {
> - riscv_load_kernel(machine, memmap[SIFIVE_E_DEV_DTIM].base, NULL);
> + riscv_load_kernel(machine, memmap[SIFIVE_E_DEV_DTIM].base,
> + false, NULL);
> }
> }
>
> diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
> index bac394c959..9a75d4aa62 100644
> --- a/hw/riscv/sifive_u.c
> +++ b/hw/riscv/sifive_u.c
> @@ -598,16 +598,8 @@ static void sifive_u_machine_init(MachineState *machine)
> kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc.u_cpus,
> firmware_end_addr);
>
> - kernel_entry = riscv_load_kernel(machine, kernel_start_addr, NULL);
> -
> - if (machine->initrd_filename) {
> - riscv_load_initrd(machine, kernel_entry);
> - }
> -
> - if (machine->kernel_cmdline && *machine->kernel_cmdline) {
> - qemu_fdt_setprop_string(machine->fdt, "/chosen", "bootargs",
> - machine->kernel_cmdline);
> - }
> + kernel_entry = riscv_load_kernel(machine, kernel_start_addr,
> + true, NULL);
> } else {
> /*
> * If dynamic firmware is used, it doesn't know where is the next mode
> diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
> index bff9475686..c517885e6e 100644
> --- a/hw/riscv/spike.c
> +++ b/hw/riscv/spike.c
> @@ -308,16 +308,7 @@ static void spike_board_init(MachineState *machine)
> firmware_end_addr);
>
> kernel_entry = riscv_load_kernel(machine, kernel_start_addr,
> - htif_symbol_callback);
> -
> - if (machine->initrd_filename) {
> - riscv_load_initrd(machine, kernel_entry);
> - }
> -
> - if (machine->kernel_cmdline && *machine->kernel_cmdline) {
> - qemu_fdt_setprop_string(machine->fdt, "/chosen", "bootargs",
> - machine->kernel_cmdline);
> - }
> + true, htif_symbol_callback);
> } else {
> /*
> * If dynamic firmware is used, it doesn't know where is the next mode
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index c8e35f861e..a931ed05ab 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -1281,16 +1281,8 @@ static void virt_machine_done(Notifier *notifier, void *data)
> kernel_start_addr = riscv_calc_kernel_start_addr(&s->soc[0],
> firmware_end_addr);
>
> - kernel_entry = riscv_load_kernel(machine, kernel_start_addr, NULL);
> -
> - if (machine->initrd_filename) {
> - riscv_load_initrd(machine, kernel_entry);
> - }
> -
> - if (machine->kernel_cmdline && *machine->kernel_cmdline) {
> - qemu_fdt_setprop_string(machine->fdt, "/chosen", "bootargs",
> - machine->kernel_cmdline);
> - }
> + kernel_entry = riscv_load_kernel(machine, kernel_start_addr,
> + true, NULL);
> } else {
> /*
> * If dynamic firmware is used, it doesn't know where is the next mode
> diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h
> index f94653a09b..c3de897371 100644
> --- a/include/hw/riscv/boot.h
> +++ b/include/hw/riscv/boot.h
> @@ -45,6 +45,7 @@ target_ulong riscv_load_firmware(const char *firmware_filename,
> symbol_fn_t sym_cb);
> target_ulong riscv_load_kernel(MachineState *machine,
> target_ulong firmware_end_addr,
> + bool load_initrd,
> symbol_fn_t sym_cb);
> void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry);
> uint64_t riscv_load_fdt(hwaddr dram_start, uint64_t dram_size, void *fdt);
> --
> 2.39.0
>
>
next prev parent reply other threads:[~2023-01-10 22:44 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-02 11:52 [PATCH v5 00/11] riscv: OpenSBI boot test and cleanups Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 01/11] tests/avocado: add RISC-V OpenSBI boot test Daniel Henrique Barboza
2023-01-10 22:28 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 02/11] hw/riscv/spike: use 'fdt' from MachineState Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 03/11] hw/riscv/sifive_u: " Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 04/11] hw/riscv/boot.c: exit early if filename is NULL in load functions Daniel Henrique Barboza
2023-01-08 3:30 ` Bin Meng
2023-01-10 22:29 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 05/11] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 06/11] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Daniel Henrique Barboza
2023-01-10 22:35 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 07/11] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Daniel Henrique Barboza
2023-01-10 22:37 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 08/11] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Daniel Henrique Barboza
2023-01-10 22:39 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 09/11] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Daniel Henrique Barboza
2023-01-10 22:40 ` Alistair Francis
2023-01-02 11:52 ` [PATCH v5 10/11] hw/riscv/boot.c: consolidate all kernel init " Daniel Henrique Barboza
2023-01-08 3:33 ` Bin Meng
2023-01-10 11:43 ` Daniel Henrique Barboza
2023-01-10 20:20 ` Daniel Henrique Barboza
2023-01-10 22:45 ` Alistair Francis
2023-01-10 22:42 ` Alistair Francis [this message]
2023-01-12 0:34 ` Alistair Francis
2023-01-12 13:24 ` Daniel Henrique Barboza
2023-01-13 5:23 ` Bin Meng
2023-01-13 7:16 ` Philippe Mathieu-Daudé
2023-01-13 10:21 ` Daniel Henrique Barboza
2023-01-13 10:30 ` Bin Meng
2023-01-13 10:49 ` Daniel Henrique Barboza
2023-01-02 11:52 ` [PATCH v5 11/11] hw/riscv/boot.c: make riscv_load_initrd() static Daniel Henrique Barboza
2023-01-10 22:41 ` Alistair Francis
2023-01-11 5:08 ` [PATCH v5 00/11] riscv: OpenSBI boot test and cleanups Alistair Francis
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