From: Alistair Francis <alistair23@gmail.com>
To: Chih-Min Chao <chihmin.chao@sifive.com>
Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"Cornelia Huck" <cohuck@redhat.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"Caio Carrara" <ccarrara@redhat.com>,
"Cleber Rosa" <crosa@redhat.com>
Subject: Re: [Qemu-devel] [PATCH] tests/boot_linux_console: add a test for riscv64 + virt
Date: Wed, 10 Jul 2019 11:50:44 -0700 [thread overview]
Message-ID: <CAKmqyKMHxX6dhopB8fxH31HGAQ3y-EvL+09jNvp3xMS-dxirQA@mail.gmail.com> (raw)
In-Reply-To: <1562781026-27570-1-git-send-email-chihmin.chao@sifive.com>
On Wed, Jul 10, 2019 at 10:51 AM Chih-Min Chao <chihmin.chao@sifive.com> wrote:
>
> Similar to the mips + malta test, it boots a Linux kernel on a virt
> board and verify the serial is working. Also, it relies on the serial
> device set by the machine itself.
>
> If riscv64 is a target being built, "make check-acceptance" will
> automatically include this test by the use of the "arch:riscv64" tags.
>
> Alternatively, this test can be run using:
>
> $ avocado run -t arch:riscv64 tests/acceptance
>
> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Awesome! Thanks for the test case. This will help a lot with RISC-V
regressions in QEMU.
> ---
> tests/acceptance/boot_linux_console.py | 40 ++++++++++++++++++++++++++++++++++
> 1 file changed, 40 insertions(+)
>
> diff --git a/tests/acceptance/boot_linux_console.py b/tests/acceptance/boot_linux_console.py
> index 3215950..bbc6b06 100644
> --- a/tests/acceptance/boot_linux_console.py
> +++ b/tests/acceptance/boot_linux_console.py
> @@ -354,3 +354,43 @@ class BootLinuxConsole(Test):
> self.vm.launch()
> console_pattern = 'Kernel command line: %s' % kernel_command_line
> self.wait_for_console_pattern(console_pattern)
> +
> + def test_riscv64_virt(self):
> + """
> + :avocado: tags=arch:riscv64
> + :avocado: tags=machine:virt
> + """
> +
> + kernel_url = ('https://github.com/chihminchao/test-binary/raw/'
These images need to be built with a standard build flow. Having them
built from SiFive's custom scripts will make debugging problems in the
future impossible. I'm also a little worried here about GPL
violations, I'm not sure if it's enough to just point to a script SHA
to meet GPL source disclosure. I know companies have huge headaches
meeting GPL requirements so this seems too easy.
> + '0b7787305d9e40815c05a805266cc74ff356239e/qemu/riscv64/'
> + 'bbl_w_kernel.gz')
Don't use BBL, most people use OpenSBI now which is what we should be
testing with.
> + kernel_hash = 'c7f6cc7967975ad42dc61ee0535db01c9cbd0968'
> + kernel_path_gz = self.fetch_asset(kernel_url, asset_hash=kernel_hash)
> + kernel_path = self.workdir + "bbl_w_kernel"
> +
> + with gzip.open(kernel_path_gz, 'rb') as f_in:
> + with open(kernel_path, 'wb') as f_out:
> + shutil.copyfileobj(f_in, f_out)
> +
> + initrd_url = ('https://github.com/groeck/linux-build-test/raw/'
> + '8584a59ed9e5eb5ee7ca91f6d74bbb06619205b8/rootfs/'
> + 'riscv64/rootfs.cpio.gz')
Same comment about build tools.
Alistair
> + initrd_hash = 'f4867d263754961b6f626cdcdc0cb334c47e3b49'
> + initrd_path = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
> +
> + self.vm.set_machine('virt')
> + self.vm.set_console()
> + kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE
> + + 'console=ttyS0 noreboot')
> + self.vm.add_args('-kernel', kernel_path,
> + '-initrd', initrd_path,
> + '-append', kernel_command_line)
> + self.vm.launch()
> + self.wait_for_console_pattern('Boot successful.')
> +
> + self.exec_command_and_wait_for_pattern('cat /proc/cpuinfo',
> + 'isa')
> + self.exec_command_and_wait_for_pattern('uname -a',
> + 'sifive')
> + self.exec_command_and_wait_for_pattern('reboot',
> + 'reboot: Restarting system')
> --
> 2.7.4
>
>
next prev parent reply other threads:[~2019-07-10 18:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-10 17:50 [Qemu-devel] [PATCH] tests/boot_linux_console: add a test for riscv64 + virt Chih-Min Chao
2019-07-10 18:50 ` Alistair Francis [this message]
2019-07-11 1:54 ` Chih-Min Chao
2019-07-11 14:41 ` Alistair Francis
2019-07-10 20:23 ` Cleber Rosa
2019-07-11 2:01 ` Chih-Min Chao
2019-07-11 13:56 ` Philippe Mathieu-Daudé
2019-07-11 14:43 ` Alistair Francis
2019-07-11 14:54 ` Philippe Mathieu-Daudé
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