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From: Alistair Francis <alistair23@gmail.com>
To: Bin Meng <bmeng.cn@gmail.com>
Cc: "Damien Hedde" <damien.hedde@greensocs.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	qemu-arm <qemu-arm@nongnu.org>,
	"Alistair Francis" <alistair.francis@wdc.com>
Subject: Re: [PATCH v3 3/6] hw/char: cadence_uart: Move clock/reset check to uart_can_receive()
Date: Thu, 2 Sep 2021 12:50:22 +1000	[thread overview]
Message-ID: <CAKmqyKMPFVKkW+R_2QaAgm_eumb-adrkMCN28oiLk_D4EyUMHA@mail.gmail.com> (raw)
In-Reply-To: <20210901124521.30599-4-bmeng.cn@gmail.com>

On Wed, Sep 1, 2021 at 10:49 PM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> Currently the clock/reset check is done in uart_receive(), but we
> can move the check to uart_can_receive() which is earlier.
>
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

>
> ---
>
> (no changes since v2)
>
> Changes in v2:
> - avoid declaring variables mid-scope
>
>  hw/char/cadence_uart.c | 17 ++++++++++-------
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index 154be34992..fff8be3619 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -235,8 +235,16 @@ static void uart_parameters_setup(CadenceUARTState *s)
>  static int uart_can_receive(void *opaque)
>  {
>      CadenceUARTState *s = opaque;
> -    int ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
> -    uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
> +    int ret;
> +    uint32_t ch_mode;
> +
> +    /* ignore characters when unclocked or in reset */
> +    if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
> +        return 0;
> +    }
> +
> +    ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
> +    ch_mode = s->r[R_MR] & UART_MR_CHMODE;
>
>      if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
>          ret = MIN(ret, CADENCE_UART_RX_FIFO_SIZE - s->rx_count);
> @@ -358,11 +366,6 @@ static void uart_receive(void *opaque, const uint8_t *buf, int size)
>      CadenceUARTState *s = opaque;
>      uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
>
> -    /* ignore characters when unclocked or in reset */
> -    if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
> -        return;
> -    }
> -
>      if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
>          uart_write_rx_fifo(opaque, buf, size);
>      }
> --
> 2.25.1
>
>


  reply	other threads:[~2021-09-02  2:52 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-01 12:45 [PATCH v3 0/6] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure Bin Meng
2021-09-01 12:45 ` [PATCH v3 1/6] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase Bin Meng
2021-09-01 12:45 ` [PATCH v3 2/6] hw/char: cadence_uart: Disable transmit when input clock is disabled Bin Meng
2021-09-01 12:45 ` [PATCH v3 3/6] hw/char: cadence_uart: Move clock/reset check to uart_can_receive() Bin Meng
2021-09-02  2:50   ` Alistair Francis [this message]
2021-09-01 12:45 ` [PATCH v3 4/6] hw/char: cadence_uart: Convert to memop_with_attrs() ops Bin Meng
2021-09-02  2:50   ` Alistair Francis
2021-09-01 12:45 ` [PATCH v3 5/6] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Bin Meng
2021-09-02  2:51   ` Alistair Francis
2021-09-01 12:45 ` [PATCH v3 6/6] hw/char: cadence_uart: Log a guest error when device is unclocked or in reset Bin Meng
2021-09-02  2:52   ` Alistair Francis
2021-09-02  5:39 ` [PATCH v3 0/6] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure Edgar E. Iglesias
2021-09-07 10:48   ` Peter Maydell

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