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Mon, 17 Jan 2022 14:50:31 -0800 (PST) MIME-Version: 1.0 References: <20211229023348.12606-1-frank.chang@sifive.com> <20211229023348.12606-8-frank.chang@sifive.com> In-Reply-To: <20211229023348.12606-8-frank.chang@sifive.com> From: Alistair Francis Date: Tue, 18 Jan 2022 08:50:05 +1000 Message-ID: Subject: Re: [PATCH 07/17] target/riscv: rvv-1.0: Add Zve64f support for single-width fp reduction insns To: Frank Chang Content-Type: text/plain; charset="UTF-8" X-Host-Lookup-Failed: Reverse DNS lookup failed for 2607:f8b0:4864:20::d2f (failed) Received-SPF: pass client-ip=2607:f8b0:4864:20::d2f; envelope-from=alistair23@gmail.com; helo=mail-io1-xd2f.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, PDS_HP_HELO_NORDNS=0.001, RCVD_IN_DNSWL_NONE=-0.0001, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V" , Bin Meng , Richard Henderson , "qemu-devel@nongnu.org Developers" , Palmer Dabbelt , Alistair Francis , LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, Dec 29, 2021 at 12:41 PM wrote: > > From: Frank Chang > > Vector single-width floating-point reduction operations for EEW=32 are > supported for Zve64f extension. > > Signed-off-by: Frank Chang Reviewed-by: Alistair Francis Alistair > --- > target/riscv/insn_trans/trans_rvv.c.inc | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/target/riscv/insn_trans/trans_rvv.c.inc b/target/riscv/insn_trans/trans_rvv.c.inc > index 0aa8b7918f..d7e288b87f 100644 > --- a/target/riscv/insn_trans/trans_rvv.c.inc > +++ b/target/riscv/insn_trans/trans_rvv.c.inc > @@ -2935,7 +2935,8 @@ GEN_OPIVV_WIDEN_TRANS(vwredsumu_vs, reduction_widen_check) > static bool freduction_check(DisasContext *s, arg_rmrr *a) > { > return reduction_check(s, a) && > - require_rvf(s); > + require_rvf(s) && > + require_zve64f(s); > } > > GEN_OPFVV_TRANS(vfredsum_vs, freduction_check) > -- > 2.31.1 > >