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It adds iopmp devices virt mac= hine > to protect all regions of system memory. > > Signed-off-by: Ethan Chen > --- > docs/system/riscv/virt.rst | 7 ++++ > hw/riscv/Kconfig | 1 + > hw/riscv/virt.c | 75 ++++++++++++++++++++++++++++++++++++++ > include/hw/riscv/virt.h | 4 ++ > 4 files changed, 87 insertions(+) > > diff --git a/docs/system/riscv/virt.rst b/docs/system/riscv/virt.rst > index 60850970ce..6b5fc1d37d 100644 > --- a/docs/system/riscv/virt.rst > +++ b/docs/system/riscv/virt.rst > @@ -146,6 +146,13 @@ The following machine-specific options are supported= : > > Enables the riscv-iommu-sys platform device. Defaults to 'off'. > > +- iopmp=3D[on|off] > + > + When this option is "on", IOPMP devices are added to machine. IOPMP ch= ecks > + memory transcations in system memory. This option is assumed to be "of= f". To > + enable the CPU to perform transactions with a specified RRID, use the = CPU > + option "-cpu ,iopmp=3Dtrue,iopmp_rrid=3D" We should include some details on the default implementation settings here as well Alistair > + > Running Linux kernel > -------------------- > > diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig > index e6a0ac1fa1..637438af2c 100644 > --- a/hw/riscv/Kconfig > +++ b/hw/riscv/Kconfig > @@ -68,6 +68,7 @@ config RISCV_VIRT > select PLATFORM_BUS > select ACPI > select ACPI_PCI > + select RISCV_IOPMP > > config SHAKTI_C > bool > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index 241389d72f..c5a8f7173e 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -57,6 +57,8 @@ > #include "hw/acpi/aml-build.h" > #include "qapi/qapi-visit-common.h" > #include "hw/virtio/virtio-iommu.h" > +#include "hw/misc/riscv_iopmp.h" > +#include "hw/misc/riscv_iopmp_dispatcher.h" > > /* KVM AIA only supports APLIC MSI. APLIC Wired is always emulated by QE= MU. */ > static bool virt_use_kvm_aia_aplic_imsic(RISCVVirtAIAType aia_type) > @@ -94,6 +96,7 @@ static const MemMapEntry virt_memmap[] =3D { > [VIRT_UART0] =3D { 0x10000000, 0x100 }, > [VIRT_VIRTIO] =3D { 0x10001000, 0x1000 }, > [VIRT_FW_CFG] =3D { 0x10100000, 0x18 }, > + [VIRT_IOPMP] =3D { 0x10200000, 0x100000 }, > [VIRT_FLASH] =3D { 0x20000000, 0x4000000 }, > [VIRT_IMSIC_M] =3D { 0x24000000, VIRT_IMSIC_MAX_SIZE }, > [VIRT_IMSIC_S] =3D { 0x28000000, VIRT_IMSIC_MAX_SIZE }, > @@ -102,6 +105,11 @@ static const MemMapEntry virt_memmap[] =3D { > [VIRT_DRAM] =3D { 0x80000000, 0x0 }, > }; > > +static const MemMapEntry iopmp_protect_memmap[] =3D { > + /* IOPMP protect all regions by default */ > + {0x0, 0xFFFFFFFF}, > +}; > + > /* PCIe high mmio is fixed for RV32 */ > #define VIRT32_HIGH_PCIE_MMIO_BASE 0x300000000ULL > #define VIRT32_HIGH_PCIE_MMIO_SIZE (4 * GiB) > @@ -1117,6 +1125,24 @@ static void create_fdt_iommu(RISCVVirtState *s, ui= nt16_t bdf) > bdf + 1, iommu_phandle, bdf + 1, 0xffff - bdf= ); > } > > +static void create_fdt_iopmp(RISCVVirtState *s, const MemMapEntry *memma= p, > + uint32_t irq_mmio_phandle) { > + g_autofree char *name =3D NULL; > + MachineState *ms =3D MACHINE(s); > + > + name =3D g_strdup_printf("/soc/iopmp@%lx", (long)memmap[VIRT_IOPMP].= base); > + qemu_fdt_add_subnode(ms->fdt, name); > + qemu_fdt_setprop_string(ms->fdt, name, "compatible", "riscv_iopmp"); > + qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0x0, memmap[VIRT_IOPMP]= .base, > + 0x0, memmap[VIRT_IOPMP].size); > + qemu_fdt_setprop_cell(ms->fdt, name, "interrupt-parent", irq_mmio_ph= andle); > + if (s->aia_type =3D=3D VIRT_AIA_TYPE_NONE) { > + qemu_fdt_setprop_cell(ms->fdt, name, "interrupts", IOPMP_IRQ); > + } else { > + qemu_fdt_setprop_cells(ms->fdt, name, "interrupts", IOPMP_IRQ, 0= x4); > + } > +} > + > static void finalize_fdt(RISCVVirtState *s) > { > uint32_t phandle =3D 1, irq_mmio_phandle =3D 1, msi_pcie_phandle =3D= 1; > @@ -1141,6 +1167,10 @@ static void finalize_fdt(RISCVVirtState *s) > create_fdt_uart(s, virt_memmap, irq_mmio_phandle); > > create_fdt_rtc(s, virt_memmap, irq_mmio_phandle); > + > + if (s->have_iopmp) { > + create_fdt_iopmp(s, virt_memmap, irq_mmio_phandle); > + } > } > > static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap) > @@ -1529,6 +1559,8 @@ static void virt_machine_init(MachineState *machine= ) > DeviceState *mmio_irqchip, *virtio_irqchip, *pcie_irqchip; > int i, base_hartid, hart_count; > int socket_count =3D riscv_socket_count(machine); > + DeviceState *iopmp_dev, *iopmp_disp_dev; > + StreamSink *iopmp_ss, *iopmp_disp_ss; > > /* Check socket count limit */ > if (VIRT_SOCKETS_MAX < socket_count) { > @@ -1710,6 +1742,29 @@ static void virt_machine_init(MachineState *machin= e) > } > virt_flash_map(s, system_memory); > > + if (s->have_iopmp) { > + iopmp_dev =3D iopmp_create(memmap[VIRT_IOPMP].base, > + qdev_get_gpio_in(DEVICE(mmio_irqchip), IOPMP_IRQ)); > + > + iopmp_setup_system_memory(iopmp_dev, &iopmp_protect_memmap[0], 1= , 0); > + > + iopmp_disp_dev =3D qdev_new(TYPE_RISCV_IOPMP_DISP); > + qdev_prop_set_uint32(DEVICE(iopmp_disp_dev), "target-num", 1); > + qdev_prop_set_uint32(DEVICE(iopmp_disp_dev), "stage-num", 1); > + qdev_realize(DEVICE(iopmp_disp_dev), NULL, &error_fatal); > + > + /* Add memmap inforamtion to dispatcher */ > + iopmp_ss =3D (StreamSink *)&(RISCV_IOPMP(iopmp_dev)->txn_info_si= nk); > + iopmp_dispatcher_add_target(DEVICE(iopmp_disp_dev), iopmp_ss, > + iopmp_protect_memmap[0].base, > + iopmp_protect_memmap[0].size, > + 0, 0); > + > + iopmp_disp_ss =3D > + (StreamSink *)&(RISCV_IOPMP_DISP(iopmp_disp_dev)->txn_info_s= ink); > + iopmp_setup_sink(iopmp_dev, iopmp_disp_ss); > + } > + > /* load/create device tree */ > if (machine->dtb) { > machine->fdt =3D load_device_tree(machine->dtb, &s->fdt_size); > @@ -1845,6 +1900,20 @@ static void virt_set_iommu_sys(Object *obj, Visito= r *v, const char *name, > visit_type_OnOffAuto(v, name, &s->iommu_sys, errp); > } > > +static bool virt_get_iopmp(Object *obj, Error **errp) > +{ > + RISCVVirtState *s =3D RISCV_VIRT_MACHINE(obj); > + > + return s->have_iopmp; > +} > + > +static void virt_set_iopmp(Object *obj, bool value, Error **errp) > +{ > + RISCVVirtState *s =3D RISCV_VIRT_MACHINE(obj); > + > + s->have_iopmp =3D value; > +} > + > bool virt_is_acpi_enabled(RISCVVirtState *s) > { > return s->acpi !=3D ON_OFF_AUTO_OFF; > @@ -1972,6 +2041,12 @@ static void virt_machine_class_init(ObjectClass *o= c, void *data) > NULL, NULL); > object_class_property_set_description(oc, "iommu-sys", > "Enable IOMMU platform device"= ); > + > + object_class_property_add_bool(oc, "iopmp", virt_get_iopmp, > + virt_set_iopmp); > + object_class_property_set_description(oc, "iopmp", > + "Set on/off to enable/disable = " > + "iopmp device"); > } > > static const TypeInfo virt_machine_typeinfo =3D { > diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h > index 48a14bea2e..77dcbd5450 100644 > --- a/include/hw/riscv/virt.h > +++ b/include/hw/riscv/virt.h > @@ -55,6 +55,7 @@ struct RISCVVirtState { > > int fdt_size; > bool have_aclint; > + bool have_iopmp; > RISCVVirtAIAType aia_type; > int aia_guests; > char *oem_id; > @@ -87,11 +88,14 @@ enum { > VIRT_PLATFORM_BUS, > VIRT_PCIE_ECAM, > VIRT_IOMMU_SYS, > + VIRT_IOPMP, > }; > > enum { > UART0_IRQ =3D 10, > RTC_IRQ =3D 11, > + IOPMP_IRQ =3D 12, > + DMA_IRQ =3D 13, > VIRTIO_IRQ =3D 1, /* 1 to 8 */ > VIRTIO_COUNT =3D 8, > PCIE_IRQ =3D 0x20, /* 32 to 35 */ > -- > 2.34.1 > >