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Tue, 24 Mar 2026 20:14:56 -0700 (PDT) MIME-Version: 1.0 References: <20260321141345.599105-1-npiggin@gmail.com> <20260321141345.599105-4-npiggin@gmail.com> In-Reply-To: <20260321141345.599105-4-npiggin@gmail.com> From: Alistair Francis Date: Wed, 25 Mar 2026 13:14:30 +1000 X-Gm-Features: AQROBzBbTjCDMjsG7crXRCYRLjoqZJYOlyEJug9L2RYbsfsPUyPND5IdLCd7Jt4 Message-ID: Subject: Re: [PATCH v3 3/5] linux-user/riscv: Add extended state to sigcontext To: Nicholas Piggin Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Laurent Vivier , Pierrick Bouvier , Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Richard Henderson , Joel Stanley Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=alistair23@gmail.com; helo=mail-ej1-x636.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Sun, Mar 22, 2026 at 12:16=E2=80=AFAM Nicholas Piggin wrote: > > Linux/riscv has extended the sigcontext with padding and an > extended state structure that can save various optional > features like vector in a flexible format. Update the > linux-user signal handling to this new structure. > > Signed-off-by: Nicholas Piggin > --- > linux-user/riscv/signal.c | 93 +++++++++++++++++++++++++++---- > linux-user/riscv/vdso-asmoffset.h | 4 +- > 2 files changed, 85 insertions(+), 12 deletions(-) > > diff --git a/linux-user/riscv/signal.c b/linux-user/riscv/signal.c > index ece276f85f..e20b9ac177 100644 > --- a/linux-user/riscv/signal.c > +++ b/linux-user/riscv/signal.c > @@ -31,14 +31,43 @@ > > The code below is qemu re-implementation of arch/riscv/kernel/signal.= c */ > > -struct target_sigcontext { > +struct target_gp_state { > abi_long pc; > abi_long gpr[31]; /* x0 is not present, so all offsets must be -1 */ > +}; > + > +struct target_fp_state { > uint64_t fpr[32]; > uint32_t fcsr; > +}; > + > +/* The Magic number for signal context frame header. */ > +#define END_MAGIC 0x0 > + > +/* The size of END signal context header. */ > +#define END_HDR_SIZE 0x0 > + > +struct target_ctx_hdr { > + uint32_t magic; > + uint32_t size; > +}; > + > +struct target_extra_ext_header { > + uint32_t __padding[129] __attribute__((aligned(16))); > + uint32_t reserved; > + struct target_ctx_hdr hdr; > +}; > + > +struct target_sigcontext { > + struct target_gp_state sc_regs; > + union { > + struct target_fp_state sc_fpregs; > + struct target_extra_ext_header sc_extdesc; > + }; > }; /* cf. riscv-linux:arch/riscv/include/uapi/asm/ptrace.h */ I would argue that arch/riscv/include/uapi/asm/sigcontext.h is a better pointer, but both work Reviewed-by: Alistair Francis Alistair > > -QEMU_BUILD_BUG_ON(offsetof(struct target_sigcontext, fpr) !=3D offsetof_= freg0); > +QEMU_BUILD_BUG_ON(offsetof(struct target_sigcontext, sc_fpregs.fpr) !=3D > + offsetof_freg0); > > struct target_ucontext { > abi_ulong uc_flags; > @@ -79,19 +108,26 @@ static abi_ulong get_sigframe(struct target_sigactio= n *ka, > > static void setup_sigcontext(struct target_sigcontext *sc, CPURISCVState= *env) > { > + struct target_ctx_hdr *hdr; > int i; > > - __put_user(env->pc, &sc->pc); > + __put_user(env->pc, &sc->sc_regs.pc); > > for (i =3D 1; i < 32; i++) { > - __put_user(env->gpr[i], &sc->gpr[i - 1]); > + __put_user(env->gpr[i], &sc->sc_regs.gpr[i - 1]); > } > for (i =3D 0; i < 32; i++) { > - __put_user(env->fpr[i], &sc->fpr[i]); > + __put_user(env->fpr[i], &sc->sc_fpregs.fpr[i]); > } > > uint32_t fcsr =3D riscv_csr_read(env, CSR_FCSR); > - __put_user(fcsr, &sc->fcsr); > + __put_user(fcsr, &sc->sc_fpregs.fcsr); > + > + __put_user(0, &sc->sc_extdesc.reserved); > + > + hdr =3D &sc->sc_extdesc.hdr; > + __put_user(END_MAGIC, &hdr->magic); > + __put_user(END_HDR_SIZE, &hdr->size); > } > > static void setup_ucontext(struct target_ucontext *uc, > @@ -147,21 +183,58 @@ badframe: > > static bool restore_sigcontext(CPURISCVState *env, struct target_sigcont= ext *sc) > { > + struct target_ctx_hdr *hdr; > + uint32_t rsv, magic, size; > int i; > > - __get_user(env->pc, &sc->pc); > + __get_user(env->pc, &sc->sc_regs.pc); > > for (i =3D 1; i < 32; ++i) { > - __get_user(env->gpr[i], &sc->gpr[i - 1]); > + __get_user(env->gpr[i], &sc->sc_regs.gpr[i - 1]); > } > for (i =3D 0; i < 32; ++i) { > - __get_user(env->fpr[i], &sc->fpr[i]); > + __get_user(env->fpr[i], &sc->sc_fpregs.fpr[i]); > } > > uint32_t fcsr; > - __get_user(fcsr, &sc->fcsr); > + __get_user(fcsr, &sc->sc_fpregs.fcsr); > riscv_csr_write(env, CSR_FCSR, fcsr); > > + hdr =3D &sc->sc_extdesc.hdr; > + __get_user(rsv, &sc->sc_extdesc.reserved); > + if (rsv !=3D 0) { > + qemu_log_mask(LOG_GUEST_ERROR, "signal: sigcontext reserved fiel= d is " > + "non-zero\n"); > + return false; > + } > + > + __get_user(magic, &hdr->magic); > + while (magic !=3D END_MAGIC) { > + switch (magic) { > + default: > + qemu_log_mask(LOG_GUEST_ERROR, "signal: unknown extended sta= te in " > + "sigcontext, magic=3D0x%08x\n= ", magic); > + return false; > + } > + > + __get_user(size, &hdr->size); > + if (size =3D=3D 0) { > + qemu_log_mask(LOG_GUEST_ERROR, "signal: extended state in " > + "sigcontext has size 0\n"); > + return false; > + } > + > + hdr =3D (void *)hdr + size; > + __get_user(magic, &hdr->magic); > + } > + > + __get_user(size, &hdr->size); > + if (size !=3D END_HDR_SIZE) { > + qemu_log_mask(LOG_GUEST_ERROR, "signal: extended state end heade= r has " > + "size=3D%u (should be 0)\n", size= ); > + return false; > + } > + > return true; > } > > diff --git a/linux-user/riscv/vdso-asmoffset.h b/linux-user/riscv/vdso-as= moffset.h > index 123902ef61..92e8ac10ab 100644 > --- a/linux-user/riscv/vdso-asmoffset.h > +++ b/linux-user/riscv/vdso-asmoffset.h > @@ -1,9 +1,9 @@ > #ifdef TARGET_ABI32 > -# define sizeof_rt_sigframe 0x2b0 > +# define sizeof_rt_sigframe 0x3b0 > # define offsetof_uc_mcontext 0x120 > # define offsetof_freg0 0x80 > #else > -# define sizeof_rt_sigframe 0x340 > +# define sizeof_rt_sigframe 0x440 > # define offsetof_uc_mcontext 0x130 > # define offsetof_freg0 0x100 > #endif > -- > 2.51.0 > >