From: Alistair Francis <alistair23@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Bin Meng <bmeng.cn@gmail.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [PATCH v3 0/3] OpenTitan: Add support for the RISC-V timer
Date: Tue, 22 Jun 2021 08:39:12 +1000 [thread overview]
Message-ID: <CAKmqyKMjdfAjvWVd+V2RPFMToGmitO2CSzKTk1t+=y9pM7bZUA@mail.gmail.com> (raw)
In-Reply-To: <cover.1624001156.git.alistair.francis@wdc.com>
On Fri, Jun 18, 2021 at 5:27 PM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> V3:
> - Fix the value of the "infinite timer"
>
> Alistair Francis (3):
> hw/char/ibex_uart: Make the register layout private
> hw/timer: Initial commit of Ibex Timer
> hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer
Thanks!
Applied to riscv-to-apply.next
Alistair
>
> include/hw/char/ibex_uart.h | 37 -----
> include/hw/riscv/opentitan.h | 5 +-
> include/hw/timer/ibex_timer.h | 52 ++++++
> hw/char/ibex_uart.c | 37 +++++
> hw/riscv/opentitan.c | 14 +-
> hw/timer/ibex_timer.c | 305 ++++++++++++++++++++++++++++++++++
> MAINTAINERS | 6 +-
> hw/timer/meson.build | 1 +
> 8 files changed, 412 insertions(+), 45 deletions(-)
> create mode 100644 include/hw/timer/ibex_timer.h
> create mode 100644 hw/timer/ibex_timer.c
>
> --
> 2.31.1
>
prev parent reply other threads:[~2021-06-21 22:40 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-18 7:27 [PATCH v3 0/3] OpenTitan: Add support for the RISC-V timer Alistair Francis
2021-06-18 7:27 ` [PATCH v3 1/3] hw/char/ibex_uart: Make the register layout private Alistair Francis
2021-06-18 7:27 ` [PATCH v3 2/3] hw/timer: Initial commit of Ibex Timer Alistair Francis
2021-06-18 9:59 ` Bin Meng
2021-06-18 7:28 ` [PATCH v3 3/3] hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer Alistair Francis
2021-06-21 22:39 ` Alistair Francis [this message]
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