From: Alistair Francis <alistair23@gmail.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org, "Weiwei Li" <liwei1518@gmail.com>,
"Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
"Warner Losh" <imp@bsdimp.com>,
"Frédéric Pétrot" <frederic.petrot@univ-grenoble-alpes.fr>,
"Vijai Kumar K" <vijai@behindbytes.com>,
"Anton Johansson" <anjo@rev.ng>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
qemu-riscv@nongnu.org,
"Alistair Francis" <Alistair.Francis@wdc.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Jiaxun Yang" <jiaxun.yang@flygoat.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Djordje Todorovic" <Djordje.Todorovic@htecgroup.com>,
"Laurent Vivier" <laurent@vivier.eu>,
"Kyle Evans" <kevans@freebsd.org>
Subject: Re: [PATCH-for-11.1 16/16] configs/targets: Forbid RISC-V to use legacy native endianness APIs
Date: Thu, 26 Mar 2026 12:21:47 +1000 [thread overview]
Message-ID: <CAKmqyKMmTmts3HSciGciAc3UFMW=a_Zu=2uV+GhMmvrLR3HV4A@mail.gmail.com> (raw)
In-Reply-To: <20260318103122.97244-17-philmd@linaro.org>
On Wed, Mar 18, 2026 at 8:34 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> All RISC-V related binaries are buildable without a single
> use of the legacy "native endian" API. Set the transitional
> TARGET_USE_LEGACY_NATIVE_ENDIAN_API definition to forbid
> further uses of the legacy API.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> configs/targets/riscv32-linux-user.mak | 1 +
> configs/targets/riscv32-softmmu.mak | 1 +
> configs/targets/riscv64-bsd-user.mak | 1 +
> configs/targets/riscv64-linux-user.mak | 1 +
> configs/targets/riscv64-softmmu.mak | 1 +
> 5 files changed, 5 insertions(+)
>
> diff --git a/configs/targets/riscv32-linux-user.mak b/configs/targets/riscv32-linux-user.mak
> index f069ab9a0f9..d88fdf5e1b2 100644
> --- a/configs/targets/riscv32-linux-user.mak
> +++ b/configs/targets/riscv32-linux-user.mak
> @@ -8,3 +8,4 @@ TARGET_SYSTBL_ABI=32
> TARGET_SYSTBL_ABI=common,32,riscv,memfd_secret
> TARGET_SYSTBL=syscall.tbl
> TARGET_LONG_BITS=32
> +TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
> diff --git a/configs/targets/riscv32-softmmu.mak b/configs/targets/riscv32-softmmu.mak
> index 26080599be7..5d5016d0083 100644
> --- a/configs/targets/riscv32-softmmu.mak
> +++ b/configs/targets/riscv32-softmmu.mak
> @@ -5,3 +5,4 @@ TARGET_XML_FILES= riscv-32bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri
> TARGET_NEED_FDT=y
> TARGET_LONG_BITS=32
> TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
> diff --git a/configs/targets/riscv64-bsd-user.mak b/configs/targets/riscv64-bsd-user.mak
> index bc85d9ed04e..5b4e138099f 100644
> --- a/configs/targets/riscv64-bsd-user.mak
> +++ b/configs/targets/riscv64-bsd-user.mak
> @@ -3,3 +3,4 @@ TARGET_BASE_ARCH=riscv
> TARGET_ABI_DIR=riscv
> TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml riscv-64bit-virtual.xml
> TARGET_LONG_BITS=64
> +TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
> diff --git a/configs/targets/riscv64-linux-user.mak b/configs/targets/riscv64-linux-user.mak
> index bca08645124..35621520c56 100644
> --- a/configs/targets/riscv64-linux-user.mak
> +++ b/configs/targets/riscv64-linux-user.mak
> @@ -8,3 +8,4 @@ TARGET_SYSTBL_ABI=64
> TARGET_SYSTBL_ABI=common,64,riscv,rlimit,memfd_secret
> TARGET_SYSTBL=syscall.tbl
> TARGET_LONG_BITS=64
> +TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
> diff --git a/configs/targets/riscv64-softmmu.mak b/configs/targets/riscv64-softmmu.mak
> index 5059c550480..a10dc03c04c 100644
> --- a/configs/targets/riscv64-softmmu.mak
> +++ b/configs/targets/riscv64-softmmu.mak
> @@ -6,3 +6,4 @@ TARGET_XML_FILES= riscv-64bit-cpu.xml riscv-32bit-fpu.xml riscv-64bit-fpu.xml ri
> TARGET_NEED_FDT=y
> TARGET_LONG_BITS=64
> TARGET_NOT_USING_LEGACY_LDST_PHYS_API=y
> +TARGET_NOT_USING_LEGACY_NATIVE_ENDIAN_API=y
> --
> 2.53.0
>
>
next prev parent reply other threads:[~2026-03-26 2:22 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-18 10:31 [PATCH-for-11.1 00/16] target/riscv: Forbid to use legacy native endianness API Philippe Mathieu-Daudé
2026-03-18 10:31 ` [PATCH-for-11.1 01/16] hw/riscv: Mark RISC-V specific peripherals as little-endian Philippe Mathieu-Daudé
2026-03-19 1:43 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 02/16] target/riscv: Use explicit little-endian LD/ST API Philippe Mathieu-Daudé
2026-03-19 3:09 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 03/16] target/riscv: Make LQ and SQ use 128-bit ld/st Philippe Mathieu-Daudé
2026-03-26 2:06 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 04/16] target/riscv: Remove MTTCG check for x-rv128 CPU model Philippe Mathieu-Daudé
2026-03-26 2:06 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 05/16] target/riscv: Explode MO_TExx -> MO_TE | MO_xx (again) Philippe Mathieu-Daudé
2026-03-26 2:07 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 06/16] target/riscv: Conceal MO_ALIGN|MO_TE within load_acquire / store_release Philippe Mathieu-Daudé
2026-03-26 2:08 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 07/16] target/riscv: Factor tiny ldn() helper in gdbstub Philippe Mathieu-Daudé
2026-03-26 2:09 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 08/16] target/riscv: Simplify riscv_cpu_gdb_write_register() Philippe Mathieu-Daudé
2026-03-26 2:12 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 09/16] target/riscv: Expose mo_endian_env() Philippe Mathieu-Daudé
2026-03-26 2:13 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 10/16] target/riscv: Have gdbstub consider CPU endianness Philippe Mathieu-Daudé
2026-03-26 2:15 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 11/16] target/riscv: Replace MO_TE by mo_endian (MIPS extension) Philippe Mathieu-Daudé
2026-03-26 2:17 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 12/16] target/riscv: Replace MO_TE by mo_endian (Zilsd extension) Philippe Mathieu-Daudé
2026-03-26 2:18 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 13/16] target/riscv: Replace MO_TE by mo_endian (Zalasr extension) Philippe Mathieu-Daudé
2026-03-26 2:20 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 14/16] target/riscv: Replace MO_TE -> MO_LE Philippe Mathieu-Daudé
2026-03-26 2:21 ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 15/16] target/riscv: Use MO_LE for instruction fetch Philippe Mathieu-Daudé
2026-03-20 11:27 ` Djordje Todorovic
2026-03-18 10:31 ` [PATCH-for-11.1 16/16] configs/targets: Forbid RISC-V to use legacy native endianness APIs Philippe Mathieu-Daudé
2026-03-26 2:21 ` Alistair Francis [this message]
2026-03-26 2:28 ` [PATCH-for-11.1 00/16] target/riscv: Forbid to use legacy native endianness API Alistair Francis
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