Re: [PATCH v5 0/6] Introduce svukte ISA extension

[Alistair Francis <alistair23@gmail.com>]

On Tue, Dec 3, 2024 at 12:39 PM Fea.Wang <fea.wang@sifive.com> wrote:
>
> The Svukte ISA extension has been approved for fast-track development.
> https://lf-riscv.atlassian.net/browse/RVS-2977
> And there are Linux patches for the Svukte that are under review.
> https://lore.kernel.org/kvm/20240920-dev-maxh-svukte-rebase-v1-0-7864a88a62bd@sifive.com/T/#mf70fcb22cd2987ad268c0efee9b8583197d3cb4f
>
> Svukte provides a means to make user-mode accesses to supervisor memory
> raise page faults in constant time, mitigating attacks that attempt to
> discover the supervisor software's address-space layout.
>
> Refer to the draft of svukte extension from:
> https://github.com/riscv/riscv-isa-manual/pull/1564
>
> base-commit: 2209cae121e5da3cfbdb9dd4b06d52d0ef66ea69
>
> [v5]
> * Update the warning log and the commit message
>
> [v4]
> * Add a svukte extension check in RV32.
> * Refine the code.
>
> [v3]
> * Fix some typos
> * Refine code by separating a function into two dedicated functions.
> * Follow the riscv,isa order
>
> [v2]
> * Refactor the code
>
> [v1]
> * Add svukte extension
>
> Fea.Wang (6):
>   target/riscv: Add svukte extension capability variable
>   target/riscv: Support senvcfg[UKTE] bit when svukte extension is
>     enabled
>   target/riscv: Support hstatus[HUKTE] bit when svukte extension is
>     enabled
>   target/riscv: Check memory access to meet svukte rule
>   target/riscv: Expose svukte ISA extension
>   target/riscv: Check svukte is not enabled in RV32

Thanks!

Applied to riscv-to-apply.next

Alistair

>
>  target/riscv/cpu.c         |  2 ++
>  target/riscv/cpu_bits.h    |  2 ++
>  target/riscv/cpu_cfg.h     |  1 +
>  target/riscv/cpu_helper.c  | 55 ++++++++++++++++++++++++++++++++++++++
>  target/riscv/csr.c         |  7 +++++
>  target/riscv/tcg/tcg-cpu.c |  5 ++++
>  6 files changed, 72 insertions(+)
>
> --
> 2.34.1
>
>