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That's all we know. X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Igor Mitsyanko , Alistair Francis , "Edgar E. Iglesias" , "qemu-devel@nongnu.org Developers" , qemu-arm , =?UTF-8?B?TWFyYy1BbmRyw6kgTHVyZWF1?= , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Mon, May 18, 2020 at 7:03 AM Philippe Mathieu-Daud=C3=A9 wrote: > > hw_error() calls exit(). This a bit overkill when we can log > the accesses as unimplemented or guest error. > > When fuzzing the devices, we don't want the whole process to > exit. Replace some hw_error() calls by qemu_log_mask(). > > Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Alistair > --- > hw/arm/pxa2xx_gpio.c | 7 ++++--- > hw/display/pxa2xx_lcd.c | 8 +++++--- > hw/dma/pxa2xx_dma.c | 14 +++++++++----- > 3 files changed, 18 insertions(+), 11 deletions(-) > > diff --git a/hw/arm/pxa2xx_gpio.c b/hw/arm/pxa2xx_gpio.c > index f8df3cc227..a01db54a51 100644 > --- a/hw/arm/pxa2xx_gpio.c > +++ b/hw/arm/pxa2xx_gpio.c > @@ -9,7 +9,6 @@ > > #include "qemu/osdep.h" > #include "cpu.h" > -#include "hw/hw.h" > #include "hw/irq.h" > #include "hw/qdev-properties.h" > #include "hw/sysbus.h" > @@ -199,7 +198,8 @@ static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr= offset, > return s->status[bank]; > > default: > - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX = "\n", > + __func__, offset); > } > > return 0; > @@ -252,7 +252,8 @@ static void pxa2xx_gpio_write(void *opaque, hwaddr of= fset, > break; > > default: > - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX = "\n", > + __func__, offset); > } > } > > diff --git a/hw/display/pxa2xx_lcd.c b/hw/display/pxa2xx_lcd.c > index 464e93161a..d5f2e82a4e 100644 > --- a/hw/display/pxa2xx_lcd.c > +++ b/hw/display/pxa2xx_lcd.c > @@ -11,7 +11,7 @@ > */ > > #include "qemu/osdep.h" > -#include "hw/hw.h" > +#include "qemu/log.h" > #include "hw/irq.h" > #include "migration/vmstate.h" > #include "ui/console.h" > @@ -407,7 +407,8 @@ static uint64_t pxa2xx_lcdc_read(void *opaque, hwaddr= offset, > > default: > fail: > - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX = "\n", > + __func__, offset); > } > > return 0; > @@ -562,7 +563,8 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr of= fset, > > default: > fail: > - hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX = "\n", > + __func__, offset); > } > } > > diff --git a/hw/dma/pxa2xx_dma.c b/hw/dma/pxa2xx_dma.c > index 88ed4b6ff1..8a2eeb32bc 100644 > --- a/hw/dma/pxa2xx_dma.c > +++ b/hw/dma/pxa2xx_dma.c > @@ -9,6 +9,7 @@ > */ > > #include "qemu/osdep.h" > +#include "qemu/log.h" > #include "hw/hw.h" > #include "hw/irq.h" > #include "hw/qdev-properties.h" > @@ -268,7 +269,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr = offset, > unsigned int channel; > > if (size !=3D 4) { > - hw_error("%s: Bad access width\n", __func__); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n", > + __func__, size); > return 5; > } > > @@ -315,8 +317,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr = offset, > return s->chan[channel].cmd; > } > } > - > - hw_error("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n"= , > + __func__, offset); > return 7; > } > > @@ -327,7 +329,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr off= set, > unsigned int channel; > > if (size !=3D 4) { > - hw_error("%s: Bad access width\n", __func__); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n", > + __func__, size); > return; > } > > @@ -420,7 +423,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr off= set, > break; > } > fail: > - hw_error("%s: Bad offset " TARGET_FMT_plx "\n", __func__, offset= ); > + qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX = "\n", > + __func__, offset); > } > } > > -- > 2.21.3 > >