From: Alistair Francis <alistair23@gmail.com>
To: Sebastian Huber <sebastian.huber@embedded-brains.de>
Cc: qemu-devel@nongnu.org, Conor Dooley <conor.dooley@microchip.com>,
Bin Meng <bin.meng@windriver.com>
Subject: Re: [PATCH 2/5] hw/riscv: More flexible FDT placement for MPFS
Date: Mon, 24 Feb 2025 15:15:26 +1000 [thread overview]
Message-ID: <CAKmqyKN60a4hFPftFKOKPWT0J9NCXOURXYSGA+3pAsj5c0oBFw@mail.gmail.com> (raw)
In-Reply-To: <20250214062443.9936-3-sebastian.huber@embedded-brains.de>
On Fri, Feb 14, 2025 at 4:26 PM Sebastian Huber
<sebastian.huber@embedded-brains.de> wrote:
>
> If the kernel entry is in the high DRAM area, place the FDT into this
> area.
>
> Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> hw/riscv/microchip_pfsoc.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
> index ec7e2e4226..2ddc3464bb 100644
> --- a/hw/riscv/microchip_pfsoc.c
> +++ b/hw/riscv/microchip_pfsoc.c
> @@ -626,8 +626,15 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
> kernel_entry = boot_info.image_low_addr;
>
> /* Compute the fdt load address in dram */
> - fdt_load_addr = riscv_compute_fdt_addr(memmap[MICROCHIP_PFSOC_DRAM_LO].base,
> - memmap[MICROCHIP_PFSOC_DRAM_LO].size,
> + hwaddr kernel_ram_base = memmap[MICROCHIP_PFSOC_DRAM_LO].base;
> + hwaddr kernel_ram_size = memmap[MICROCHIP_PFSOC_DRAM_LO].size;
> +
> + if (kernel_entry - kernel_ram_base >= kernel_ram_size) {
> + kernel_ram_base = memmap[MICROCHIP_PFSOC_DRAM_HI].base;
> + kernel_ram_size = mem_high_size;
> + }
> +
> + fdt_load_addr = riscv_compute_fdt_addr(kernel_ram_base, kernel_ram_size,
> machine, &boot_info);
> riscv_load_fdt(fdt_load_addr, machine->fdt);
>
> --
> 2.43.0
>
>
next prev parent reply other threads:[~2025-02-24 5:36 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-14 6:24 [PATCH 0/5] Improve Microchip Polarfire SoC customization Sebastian Huber
2025-02-14 6:24 ` [PATCH 1/5] hw/misc: Add MPFS system reset support Sebastian Huber
2025-02-14 6:24 ` [PATCH 2/5] hw/riscv: More flexible FDT placement for MPFS Sebastian Huber
2025-02-24 5:15 ` Alistair Francis [this message]
2025-02-14 6:24 ` [PATCH 3/5] hw/riscv: Make FDT optional " Sebastian Huber
2025-02-24 5:22 ` Alistair Francis
2025-02-24 5:43 ` Sebastian Huber
2025-02-24 6:27 ` Alistair Francis
2025-02-14 6:24 ` [PATCH 4/5] hw/riscv: Allow direct start of kernel " Sebastian Huber
2025-02-21 0:11 ` [PATCH v2] " Sebastian Huber
2025-02-14 6:24 ` [PATCH 5/5] hw/riscv: Configurable MPFS CLINT timebase freq Sebastian Huber
2025-02-16 14:06 ` Philippe Mathieu-Daudé
2025-02-20 18:30 ` [PATCH 0/5] Improve Microchip Polarfire SoC customization Conor Dooley
2025-02-20 22:29 ` Philippe Mathieu-Daudé
2025-02-21 0:13 ` Sebastian Huber
2025-02-24 5:14 ` Alistair Francis
2025-02-24 21:28 ` Conor Dooley
2025-02-26 2:46 ` Alistair Francis
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