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Sun, 23 Feb 2025 21:15:53 -0800 (PST) MIME-Version: 1.0 References: <20250214062443.9936-1-sebastian.huber@embedded-brains.de> <20250214062443.9936-3-sebastian.huber@embedded-brains.de> In-Reply-To: <20250214062443.9936-3-sebastian.huber@embedded-brains.de> From: Alistair Francis Date: Mon, 24 Feb 2025 15:15:26 +1000 X-Gm-Features: AWEUYZk6EHZldxLpSkZOveZ5UKlM_Oyyw2VgPx1xT0JwBQeJ2Z9WI9qhADum_Lg Message-ID: Subject: Re: [PATCH 2/5] hw/riscv: More flexible FDT placement for MPFS To: Sebastian Huber Cc: qemu-devel@nongnu.org, Conor Dooley , Bin Meng Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2607:f8b0:4864:20::934; envelope-from=alistair23@gmail.com; helo=mail-ua1-x934.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Fri, Feb 14, 2025 at 4:26=E2=80=AFPM Sebastian Huber wrote: > > If the kernel entry is in the high DRAM area, place the FDT into this > area. > > Signed-off-by: Sebastian Huber Reviewed-by: Alistair Francis Alistair > --- > hw/riscv/microchip_pfsoc.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c > index ec7e2e4226..2ddc3464bb 100644 > --- a/hw/riscv/microchip_pfsoc.c > +++ b/hw/riscv/microchip_pfsoc.c > @@ -626,8 +626,15 @@ static void microchip_icicle_kit_machine_init(Machin= eState *machine) > kernel_entry =3D boot_info.image_low_addr; > > /* Compute the fdt load address in dram */ > - fdt_load_addr =3D riscv_compute_fdt_addr(memmap[MICROCHIP_PFSOC_= DRAM_LO].base, > - memmap[MICROCHIP_PFSOC_DR= AM_LO].size, > + hwaddr kernel_ram_base =3D memmap[MICROCHIP_PFSOC_DRAM_LO].base; > + hwaddr kernel_ram_size =3D memmap[MICROCHIP_PFSOC_DRAM_LO].size; > + > + if (kernel_entry - kernel_ram_base >=3D kernel_ram_size) { > + kernel_ram_base =3D memmap[MICROCHIP_PFSOC_DRAM_HI].base; > + kernel_ram_size =3D mem_high_size; > + } > + > + fdt_load_addr =3D riscv_compute_fdt_addr(kernel_ram_base, kernel= _ram_size, > machine, &boot_info); > riscv_load_fdt(fdt_load_addr, machine->fdt); > > -- > 2.43.0 > >