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From: Alistair Francis <alistair23@gmail.com>
To: "yang.zhang" <gaoshanliukou@163.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, palmer@dabbelt.com,
	 alistair.francis@wdc.com, bin.meng@windriver.com,
	pbonzini@redhat.com,  kvm@vger.kernel.org,
	zhiwei_liu@linux.alibaba.com, dbarboza@ventanamicro.com,
	 "yang.zhang" <yang.zhang@hexintek.com>
Subject: Re: [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly
Date: Mon, 10 Jul 2023 10:55:08 +1000	[thread overview]
Message-ID: <CAKmqyKNFx=t4x25fLQWdtWhzhOrN-+xU0FmifquT8pcfNALbng@mail.gmail.com> (raw)
In-Reply-To: <20230707032306.4606-1-gaoshanliukou@163.com>

On Fri, Jul 7, 2023 at 10:26 PM yang.zhang <gaoshanliukou@163.com> wrote:
>
> From: "yang.zhang" <yang.zhang@hexintek.com>
>
> Should set/get riscv all reg timer,i.e, time/compare/frequency/state.
>
> Signed-off-by:Yang Zhang <yang.zhang@hexintek.com>
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1688

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/kvm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
> index 30f21453d6..0c567f668c 100644
> --- a/target/riscv/kvm.c
> +++ b/target/riscv/kvm.c
> @@ -99,7 +99,7 @@ static uint64_t kvm_riscv_reg_id(CPURISCVState *env, uint64_t type,
>
>  #define KVM_RISCV_SET_TIMER(cs, env, name, reg) \
>      do { \
> -        int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, time), &reg); \
> +        int ret = kvm_set_one_reg(cs, RISCV_TIMER_REG(env, name), &reg); \
>          if (ret) { \
>              abort(); \
>          } \
> --
> 2.25.1
>
>


  parent reply	other threads:[~2023-07-10  0:56 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-07  3:23 [PATCH] target/riscv KVM_RISCV_SET_TIMER macro is not configured correctly yang.zhang
2023-07-07  7:16 ` Daniel Henrique Barboza
2023-07-10  0:55 ` Alistair Francis [this message]
2023-07-10  1:01 ` Alistair Francis

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