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* [PATCH-for-11.1 00/16] target/riscv: Forbid to use legacy native endianness API
@ 2026-03-18 10:31 Philippe Mathieu-Daudé
  2026-03-18 10:31 ` [PATCH-for-11.1 01/16] hw/riscv: Mark RISC-V specific peripherals as little-endian Philippe Mathieu-Daudé
                   ` (16 more replies)
  0 siblings, 17 replies; 34+ messages in thread
From: Philippe Mathieu-Daudé @ 2026-03-18 10:31 UTC (permalink / raw)
  To: qemu-devel
  Cc: Weiwei Li, Pierrick Bouvier, Warner Losh,
	Frédéric Pétrot, Vijai Kumar K, Anton Johansson,
	Daniel Henrique Barboza, qemu-riscv, Alistair Francis,
	Palmer Dabbelt, Jiaxun Yang, Peter Maydell,
	Philippe Mathieu-Daudé, Alistair Francis, Liu Zhiwei,
	Djordje Todorovic

Thanks to Frédéric patch on 128-bit registers, we can now
remove all legacy native endianness API uses of RISC-V.

Djordje: You should (re)base your "Add RISC-V big-endian
target support" [*] series on this (after addressing the
review comments) before posting your v4.

[*] https://lore.kernel.org/qemu-devel/20260311115910.564481-1-djordje.todorovic@htecgroup.com/

Djordje Todorovic (1):
  target/riscv: Use MO_LE for instruction fetch

Frédéric Pétrot (2):
  target/riscv: Make LQ and SQ use 128-bit ld/st
  target/riscv: Remove MTTCG check for x-rv128 CPU model

Philippe Mathieu-Daudé (13):
  hw/riscv: Mark RISC-V specific peripherals as little-endian
  target/riscv: Use explicit little-endian LD/ST API
  target/riscv: Explode MO_TExx -> MO_TE | MO_xx (again)
  target/riscv: Conceal MO_ALIGN|MO_TE within load_acquire /
    store_release
  target/riscv: Factor tiny ldn() helper in gdbstub
  target/riscv: Simplify riscv_cpu_gdb_write_register()
  target/riscv: Expose mo_endian_env()
  target/riscv: Have gdbstub consider CPU endianness
  target/riscv: Replace MO_TE by mo_endian (MIPS extension)
  target/riscv: Replace MO_TE by mo_endian (Zilsd extension)
  target/riscv: Replace MO_TE by mo_endian (Zalasr extension)
  target/riscv: Replace MO_TE -> MO_LE
  configs/targets: Forbid RISC-V to use legacy native endianness APIs

 configs/targets/riscv32-linux-user.mak       |  1 +
 configs/targets/riscv32-softmmu.mak          |  1 +
 configs/targets/riscv64-bsd-user.mak         |  1 +
 configs/targets/riscv64-linux-user.mak       |  1 +
 configs/targets/riscv64-softmmu.mak          |  1 +
 target/riscv/internals.h                     | 12 ++++++
 hw/char/ibex_uart.c                          |  2 +-
 hw/char/shakti_uart.c                        |  2 +-
 hw/char/sifive_uart.c                        |  2 +-
 hw/misc/sifive_e_aon.c                       |  2 +-
 hw/misc/sifive_e_prci.c                      |  2 +-
 hw/misc/sifive_u_otp.c                       |  2 +-
 hw/misc/sifive_u_prci.c                      |  2 +-
 hw/riscv/riscv-iommu.c                       |  2 +-
 hw/sd/cadence_sdhci.c                        |  2 +-
 hw/timer/ibex_timer.c                        |  2 +-
 hw/timer/sifive_pwm.c                        |  2 +-
 target/riscv/cpu_helper.c                    |  4 +-
 target/riscv/gdbstub.c                       | 42 ++++++++------------
 target/riscv/op_helper.c                     | 14 -------
 target/riscv/tcg/tcg-cpu.c                   | 10 -----
 target/riscv/translate.c                     | 10 ++---
 target/riscv/insn_trans/trans_rvi.c.inc      | 32 +++++++++++----
 target/riscv/insn_trans/trans_rvzalasr.c.inc | 18 +++++----
 target/riscv/insn_trans/trans_xmips.c.inc    | 24 +++++++----
 target/riscv/insn_trans/trans_zilsd.c.inc    |  4 +-
 26 files changed, 104 insertions(+), 93 deletions(-)

-- 
2.53.0



^ permalink raw reply	[flat|nested] 34+ messages in thread
end of thread, other threads:[~2026-03-26  2:29 UTC | newest]

Thread overview: 34+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-03-18 10:31 [PATCH-for-11.1 00/16] target/riscv: Forbid to use legacy native endianness API Philippe Mathieu-Daudé
2026-03-18 10:31 ` [PATCH-for-11.1 01/16] hw/riscv: Mark RISC-V specific peripherals as little-endian Philippe Mathieu-Daudé
2026-03-19  1:43   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 02/16] target/riscv: Use explicit little-endian LD/ST API Philippe Mathieu-Daudé
2026-03-19  3:09   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 03/16] target/riscv: Make LQ and SQ use 128-bit ld/st Philippe Mathieu-Daudé
2026-03-26  2:06   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 04/16] target/riscv: Remove MTTCG check for x-rv128 CPU model Philippe Mathieu-Daudé
2026-03-26  2:06   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 05/16] target/riscv: Explode MO_TExx -> MO_TE | MO_xx (again) Philippe Mathieu-Daudé
2026-03-26  2:07   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 06/16] target/riscv: Conceal MO_ALIGN|MO_TE within load_acquire / store_release Philippe Mathieu-Daudé
2026-03-26  2:08   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 07/16] target/riscv: Factor tiny ldn() helper in gdbstub Philippe Mathieu-Daudé
2026-03-26  2:09   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 08/16] target/riscv: Simplify riscv_cpu_gdb_write_register() Philippe Mathieu-Daudé
2026-03-26  2:12   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 09/16] target/riscv: Expose mo_endian_env() Philippe Mathieu-Daudé
2026-03-26  2:13   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 10/16] target/riscv: Have gdbstub consider CPU endianness Philippe Mathieu-Daudé
2026-03-26  2:15   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 11/16] target/riscv: Replace MO_TE by mo_endian (MIPS extension) Philippe Mathieu-Daudé
2026-03-26  2:17   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 12/16] target/riscv: Replace MO_TE by mo_endian (Zilsd extension) Philippe Mathieu-Daudé
2026-03-26  2:18   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 13/16] target/riscv: Replace MO_TE by mo_endian (Zalasr extension) Philippe Mathieu-Daudé
2026-03-26  2:20   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 14/16] target/riscv: Replace MO_TE -> MO_LE Philippe Mathieu-Daudé
2026-03-26  2:21   ` Alistair Francis
2026-03-18 10:31 ` [PATCH-for-11.1 15/16] target/riscv: Use MO_LE for instruction fetch Philippe Mathieu-Daudé
2026-03-20 11:27   ` Djordje Todorovic
2026-03-18 10:31 ` [PATCH-for-11.1 16/16] configs/targets: Forbid RISC-V to use legacy native endianness APIs Philippe Mathieu-Daudé
2026-03-26  2:21   ` Alistair Francis
2026-03-26  2:28 ` [PATCH-for-11.1 00/16] target/riscv: Forbid to use legacy native endianness API Alistair Francis

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