[Qemu-devel] [PATCH v2 0/5] Connect the SPI devices to ZynqMP

[Qemu-devel] [PATCH v2 0/5] Connect the SPI devices to ZynqMP

[Alistair Francis]

Connect the SPI devices to Xilinx's ZynqMP.

I also need to make some changes to the actual SPI device to
imporove the fuctionality, but for the time being this works.

V2:
 - Connect the SPI flash in the board code
 - Update git patches to properly indicate rename
 - Add sst25wf080 as a SPI flash


Alistair Francis (5):
  m25p80.c: Add sst25wf080 SPI flash device
  ssi: Move ssi.h into a separate directory
  xilinx_spips: Seperate the state struct into a header
  xlnx-zynqmp: Connect the SPI devices
  xlnx-ep108: Connect the SPI Flash

 hw/arm/pxa2xx.c                     |  2 +-
 hw/arm/spitz.c                      |  2 +-
 hw/arm/stellaris.c                  |  2 +-
 hw/arm/strongarm.c                  |  2 +-
 hw/arm/tosa.c                       |  2 +-
 hw/arm/xilinx_zynq.c                |  2 +-
 hw/arm/xlnx-ep108.c                 | 20 ++++++++++
 hw/arm/xlnx-zynqmp.c                | 28 ++++++++++++++
 hw/arm/z2.c                         |  2 +-
 hw/block/m25p80.c                   |  3 +-
 hw/display/ads7846.c                |  2 +-
 hw/display/ssd0323.c                |  2 +-
 hw/microblaze/petalogix_ml605_mmu.c |  2 +-
 hw/misc/max111x.c                   |  2 +-
 hw/sd/ssi-sd.c                      |  2 +-
 hw/ssi/pl022.c                      |  2 +-
 hw/ssi/ssi.c                        |  2 +-
 hw/ssi/xilinx_spi.c                 |  2 +-
 hw/ssi/xilinx_spips.c               | 56 ++++------------------------
 include/hw/arm/xlnx-zynqmp.h        |  4 ++
 include/hw/{ => ssi}/ssi.h          | 10 +++--
 include/hw/ssi/xilinx_spips.h       | 74 +++++++++++++++++++++++++++++++++++++
 22 files changed, 157 insertions(+), 68 deletions(-)
 rename include/hw/{ => ssi}/ssi.h (96%)
 create mode 100644 include/hw/ssi/xilinx_spips.h

-- 
2.1.4

[Qemu-devel] [PATCH v2 1/5] m25p80.c: Add sst25wf080 SPI flash device

[Alistair Francis]

Add the sst25wf080 SPI flash device.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---

 hw/block/m25p80.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index efc43dd..7b9f97c 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -163,6 +163,7 @@ static const FlashPartInfo known_devices[] = {
     { INFO("sst25wf010",  0xbf2502,      0,  64 << 10,   2, ER_4K) },
     { INFO("sst25wf020",  0xbf2503,      0,  64 << 10,   4, ER_4K) },
     { INFO("sst25wf040",  0xbf2504,      0,  64 << 10,   8, ER_4K) },
+    { INFO("sst25wf080",  0xbf2505,      0,  64 << 10,  16, ER_4K) },
 
     /* ST Microelectronics -- newer production may have feature updates */
     { INFO("m25p05",      0x202010,      0,  32 << 10,   2, 0) },
-- 
2.1.4

[Qemu-devel] [PATCH v2 2/5] ssi: Move ssi.h into a separate directory

[Alistair Francis]

Move the ssi.h include file into the ssi directory.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V2:
 - Change git patch to indicate rename

 hw/arm/pxa2xx.c                     |  2 +-
 hw/arm/spitz.c                      |  2 +-
 hw/arm/stellaris.c                  |  2 +-
 hw/arm/strongarm.c                  |  2 +-
 hw/arm/tosa.c                       |  2 +-
 hw/arm/xilinx_zynq.c                |  2 +-
 hw/arm/z2.c                         |  2 +-
 hw/block/m25p80.c                   |  2 +-
 hw/display/ads7846.c                |  2 +-
 hw/display/ssd0323.c                |  2 +-
 hw/microblaze/petalogix_ml605_mmu.c |  2 +-
 hw/misc/max111x.c                   |  2 +-
 hw/sd/ssi-sd.c                      |  2 +-
 hw/ssi/pl022.c                      |  2 +-
 hw/ssi/ssi.c                        |  2 +-
 hw/ssi/xilinx_spi.c                 |  2 +-
 hw/ssi/xilinx_spips.c               |  2 +-
 include/hw/{ => ssi}/ssi.h          | 10 ++++++----
 18 files changed, 23 insertions(+), 21 deletions(-)
 rename include/hw/{ => ssi}/ssi.h (96%)

diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c
index 164260a..534c06f 100644
--- a/hw/arm/pxa2xx.c
+++ b/hw/arm/pxa2xx.c
@@ -12,7 +12,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/char/serial.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "sysemu/char.h"
 #include "sysemu/block-backend.h"
 #include "sysemu/blockdev.h"
diff --git a/hw/arm/spitz.c b/hw/arm/spitz.c
index 2af03be..c9405af 100644
--- a/hw/arm/spitz.c
+++ b/hw/arm/spitz.c
@@ -16,7 +16,7 @@
 #include "sysemu/sysemu.h"
 #include "hw/pcmcia.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/block/flash.h"
 #include "qemu/timer.h"
 #include "hw/devices.h"
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 3d6486f..c785e90 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -8,7 +8,7 @@
  */
 
 #include "hw/sysbus.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/arm/arm.h"
 #include "hw/devices.h"
 #include "qemu/timer.h"
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 9624ecb..4d2ba02 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -34,7 +34,7 @@
 #include "hw/arm/arm.h"
 #include "sysemu/char.h"
 #include "sysemu/sysemu.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 //#define DEBUG
 
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index 51d0b89..6b210a6 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -19,7 +19,7 @@
 #include "hw/pcmcia.h"
 #include "hw/boards.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "sysemu/block-backend.h"
 #include "hw/sysbus.h"
 #include "exec/address-spaces.h"
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 9f89483..9db9602 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -24,7 +24,7 @@
 #include "hw/block/flash.h"
 #include "sysemu/block-backend.h"
 #include "hw/loader.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "qemu/error-report.h"
 
 #define NUM_SPI_FLASHES 4
diff --git a/hw/arm/z2.c b/hw/arm/z2.c
index b44eb76..c82fe2c 100644
--- a/hw/arm/z2.c
+++ b/hw/arm/z2.c
@@ -16,7 +16,7 @@
 #include "hw/arm/arm.h"
 #include "hw/devices.h"
 #include "hw/i2c/i2c.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/boards.h"
 #include "sysemu/sysemu.h"
 #include "hw/block/flash.h"
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 7b9f97c..addd907 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -24,7 +24,7 @@
 #include "hw/hw.h"
 #include "sysemu/block-backend.h"
 #include "sysemu/blockdev.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 #ifndef M25P80_ERR_DEBUG
 #define M25P80_ERR_DEBUG 0
diff --git a/hw/display/ads7846.c b/hw/display/ads7846.c
index 3f35369..cb82317 100644
--- a/hw/display/ads7846.c
+++ b/hw/display/ads7846.c
@@ -10,7 +10,7 @@
  * GNU GPL, version 2 or (at your option) any later version.
  */
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "ui/console.h"
 
 typedef struct {
diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c
index 9727007..7545da8 100644
--- a/hw/display/ssd0323.c
+++ b/hw/display/ssd0323.c
@@ -10,7 +10,7 @@
 /* The controller can support a variety of different displays, but we only
    implement one.  Most of the commends relating to brightness and geometry
    setup are ignored. */
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "ui/console.h"
 
 //#define DEBUG_SSD0323 1
diff --git a/hw/microblaze/petalogix_ml605_mmu.c b/hw/microblaze/petalogix_ml605_mmu.c
index 462060f..5366cec 100644
--- a/hw/microblaze/petalogix_ml605_mmu.c
+++ b/hw/microblaze/petalogix_ml605_mmu.c
@@ -35,7 +35,7 @@
 #include "sysemu/block-backend.h"
 #include "hw/char/serial.h"
 #include "exec/address-spaces.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 #include "boot.h"
 
diff --git a/hw/misc/max111x.c b/hw/misc/max111x.c
index bef3651..d619d61 100644
--- a/hw/misc/max111x.c
+++ b/hw/misc/max111x.c
@@ -10,7 +10,7 @@
  * GNU GPL, version 2 or (at your option) any later version.
  */
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 typedef struct {
     SSISlave parent_obj;
diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c
index e4b2d4f..4fe00fd 100644
--- a/hw/sd/ssi-sd.c
+++ b/hw/sd/ssi-sd.c
@@ -12,7 +12,7 @@
 
 #include "sysemu/block-backend.h"
 #include "sysemu/blockdev.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "hw/sd.h"
 
 //#define DEBUG_SSI_SD 1
diff --git a/hw/ssi/pl022.c b/hw/ssi/pl022.c
index 61d568f..0bbf633 100644
--- a/hw/ssi/pl022.c
+++ b/hw/ssi/pl022.c
@@ -8,7 +8,7 @@
  */
 
 #include "hw/sysbus.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 //#define DEBUG_PL022 1
 
diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
index 2aab79b..a0f57c0 100644
--- a/hw/ssi/ssi.c
+++ b/hw/ssi/ssi.c
@@ -12,7 +12,7 @@
  * GNU GPL, version 2 or (at your option) any later version.
  */
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 struct SSIBus {
     BusState parent_obj;
diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c
index 620573c..94bb2a7 100644
--- a/hw/ssi/xilinx_spi.c
+++ b/hw/ssi/xilinx_spi.c
@@ -29,7 +29,7 @@
 #include "qemu/log.h"
 #include "qemu/fifo8.h"
 
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 
 #ifdef XILINX_SPI_ERR_DEBUG
 #define DB_PRINT(...) do { \
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 0910f54..e9471ff 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -27,7 +27,7 @@
 #include "hw/ptimer.h"
 #include "qemu/log.h"
 #include "qemu/fifo8.h"
-#include "hw/ssi.h"
+#include "hw/ssi/ssi.h"
 #include "qemu/bitops.h"
 
 #ifndef XILINX_SPIPS_ERR_DEBUG
diff --git a/include/hw/ssi.h b/include/hw/ssi/ssi.h
similarity index 96%
rename from include/hw/ssi.h
rename to include/hw/ssi/ssi.h
index df0f838..4a0a539 100644
--- a/include/hw/ssi.h
+++ b/include/hw/ssi/ssi.h
@@ -14,6 +14,8 @@
 #include "hw/qdev.h"
 
 typedef struct SSISlave SSISlave;
+typedef struct SSISlaveClass SSISlaveClass;
+typedef enum SSICSMode SSICSMode;
 
 #define TYPE_SSI_SLAVE "ssi-slave"
 #define SSI_SLAVE(obj) \
@@ -25,14 +27,14 @@ typedef struct SSISlave SSISlave;
 
 #define SSI_GPIO_CS "ssi-gpio-cs"
 
-typedef enum {
+enum SSICSMode {
     SSI_CS_NONE = 0,
     SSI_CS_LOW,
     SSI_CS_HIGH,
-} SSICSMode;
+};
 
 /* Slave devices.  */
-typedef struct SSISlaveClass {
+struct SSISlaveClass {
     DeviceClass parent_class;
 
     int (*init)(SSISlave *dev);
@@ -55,7 +57,7 @@ typedef struct SSISlaveClass {
      * always be called for the device for every txrx access to the parent bus
      */
     uint32_t (*transfer_raw)(SSISlave *dev, uint32_t val);
-} SSISlaveClass;
+};
 
 struct SSISlave {
     DeviceState parent_obj;
-- 
2.1.4

[Qemu-devel] [PATCH v2 3/5] xilinx_spips: Seperate the state struct into a header

[Alistair Francis]

Seperate out the XilinxSPIPS struct into a seperate header
file.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V2:
 - Only split out required #defines
 - Prefix XLNX_SPIPS_

 hw/ssi/xilinx_spips.c         | 54 ++++---------------------------
 include/hw/ssi/xilinx_spips.h | 74 +++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 81 insertions(+), 47 deletions(-)
 create mode 100644 include/hw/ssi/xilinx_spips.h

diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index e9471ff..1b7b3fb 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -29,6 +29,7 @@
 #include "qemu/fifo8.h"
 #include "hw/ssi/ssi.h"
 #include "qemu/bitops.h"
+#include "hw/ssi/xilinx_spips.h"
 
 #ifndef XILINX_SPIPS_ERR_DEBUG
 #define XILINX_SPIPS_ERR_DEBUG 0
@@ -101,10 +102,6 @@
 #define R_LQSPI_STS         (0xA4 / 4)
 #define LQSPI_STS_WR_RECVD      (1 << 1)
 
-#define R_MOD_ID            (0xFC / 4)
-
-#define R_MAX (R_MOD_ID+1)
-
 /* size of TXRX FIFOs */
 #define RXFF_A          32
 #define TXFF_A          32
@@ -135,30 +132,6 @@ typedef enum {
 } FlashCMD;
 
 typedef struct {
-    SysBusDevice parent_obj;
-
-    MemoryRegion iomem;
-    MemoryRegion mmlqspi;
-
-    qemu_irq irq;
-    int irqline;
-
-    uint8_t num_cs;
-    uint8_t num_busses;
-
-    uint8_t snoop_state;
-    qemu_irq *cs_lines;
-    SSIBus **spi;
-
-    Fifo8 rx_fifo;
-    Fifo8 tx_fifo;
-
-    uint8_t num_txrx_bytes;
-
-    uint32_t regs[R_MAX];
-} XilinxSPIPS;
-
-typedef struct {
     XilinxSPIPS parent_obj;
 
     uint8_t lqspi_buf[LQSPI_CACHE_SIZE];
@@ -174,19 +147,6 @@ typedef struct XilinxSPIPSClass {
     uint32_t tx_fifo_size;
 } XilinxSPIPSClass;
 
-#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
-#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
-
-#define XILINX_SPIPS(obj) \
-     OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
-#define XILINX_SPIPS_CLASS(klass) \
-     OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
-#define XILINX_SPIPS_GET_CLASS(obj) \
-     OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
-
-#define XILINX_QSPIPS(obj) \
-     OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
-
 static inline int num_effective_busses(XilinxSPIPS *s)
 {
     return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS &&
@@ -257,7 +217,7 @@ static void xilinx_spips_reset(DeviceState *d)
     XilinxSPIPS *s = XILINX_SPIPS(d);
 
     int i;
-    for (i = 0; i < R_MAX; i++) {
+    for (i = 0; i < XLNX_SPIPS_R_MAX; i++) {
         s->regs[i] = 0;
     }
 
@@ -269,7 +229,7 @@ static void xilinx_spips_reset(DeviceState *d)
     s->regs[R_TX_THRES] = 1;
     s->regs[R_RX_THRES] = 1;
     /* FIXME: move magic number definition somewhere sensible */
-    s->regs[R_MOD_ID] = 0x01090106;
+    s->regs[XLNX_SPIPS_R_MOD_ID] = 0x01090106;
     s->regs[R_LQSPI_CFG] = R_LQSPI_CFG_RESET;
     s->snoop_state = SNOOP_CHECKING;
     xilinx_spips_update_ixr(s);
@@ -427,7 +387,7 @@ static uint64_t xilinx_spips_read(void *opaque, hwaddr addr,
     case R_SLAVE_IDLE_COUNT:
         mask = 0xFF;
         break;
-    case R_MOD_ID:
+    case XLNX_SPIPS_R_MOD_ID:
         mask = 0x01FFFFFF;
         break;
     case R_INTR_EN:
@@ -500,7 +460,7 @@ static void xilinx_spips_write(void *opaque, hwaddr addr,
         break;
     case R_RX_DATA:
     case R_INTR_MASK:
-    case R_MOD_ID:
+    case XLNX_SPIPS_R_MOD_ID:
         mask = 0;
         break;
     case R_TX_DATA:
@@ -664,7 +624,7 @@ static void xilinx_spips_realize(DeviceState *dev, Error **errp)
     }
 
     memory_region_init_io(&s->iomem, OBJECT(s), xsc->reg_ops, s,
-                          "spi", R_MAX*4);
+                          "spi", XLNX_SPIPS_R_MAX*4);
     sysbus_init_mmio(sbd, &s->iomem);
 
     s->irqline = -1;
@@ -708,7 +668,7 @@ static const VMStateDescription vmstate_xilinx_spips = {
     .fields = (VMStateField[]) {
         VMSTATE_FIFO8(tx_fifo, XilinxSPIPS),
         VMSTATE_FIFO8(rx_fifo, XilinxSPIPS),
-        VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, R_MAX),
+        VMSTATE_UINT32_ARRAY(regs, XilinxSPIPS, XLNX_SPIPS_R_MAX),
         VMSTATE_UINT8(snoop_state, XilinxSPIPS),
         VMSTATE_END_OF_LIST()
     }
diff --git a/include/hw/ssi/xilinx_spips.h b/include/hw/ssi/xilinx_spips.h
new file mode 100644
index 0000000..f01d276
--- /dev/null
+++ b/include/hw/ssi/xilinx_spips.h
@@ -0,0 +1,74 @@
+/*
+ * Header file for the Xilinx Zynq SPI controller
+ *
+ * Copyright (C) 2015 Xilinx Inc
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef XLNX_SPIPS_H
+#define XLNX_SPIPS_H
+
+#include "hw/ssi/ssi.h"
+#include "qemu/fifo8.h"
+
+typedef struct XilinxSPIPS XilinxSPIPS;
+
+#define XLNX_SPIPS_R_MOD_ID     (0xFC / 4)
+
+#define XLNX_SPIPS_R_MAX        (XLNX_SPIPS_R_MOD_ID + 1)
+
+struct XilinxSPIPS {
+    SysBusDevice parent_obj;
+
+    MemoryRegion iomem;
+    MemoryRegion mmlqspi;
+
+    qemu_irq irq;
+    int irqline;
+
+    uint8_t num_cs;
+    uint8_t num_busses;
+
+    uint8_t snoop_state;
+    qemu_irq *cs_lines;
+    SSIBus **spi;
+
+    Fifo8 rx_fifo;
+    Fifo8 tx_fifo;
+
+    uint8_t num_txrx_bytes;
+
+    uint32_t regs[XLNX_SPIPS_R_MAX];
+};
+
+#define TYPE_XILINX_SPIPS "xlnx.ps7-spi"
+#define TYPE_XILINX_QSPIPS "xlnx.ps7-qspi"
+
+#define XILINX_SPIPS(obj) \
+     OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
+#define XILINX_SPIPS_CLASS(klass) \
+     OBJECT_CLASS_CHECK(XilinxSPIPSClass, (klass), TYPE_XILINX_SPIPS)
+#define XILINX_SPIPS_GET_CLASS(obj) \
+     OBJECT_GET_CLASS(XilinxSPIPSClass, (obj), TYPE_XILINX_SPIPS)
+
+#define XILINX_QSPIPS(obj) \
+     OBJECT_CHECK(XilinxQSPIPS, (obj), TYPE_XILINX_QSPIPS)
+
+#endif /* XLNX_SPIPS_H */
-- 
2.1.4

[Qemu-devel] [PATCH v2 5/5] xlnx-ep108: Connect the SPI Flash

[Alistair Francis]

Connect the sst25wf080 SPI flash to the EP108 board.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V2:
 - Use sst25wf080 instead of m25p80

 hw/arm/xlnx-ep108.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
index 2899698..9755c30 100644
--- a/hw/arm/xlnx-ep108.c
+++ b/hw/arm/xlnx-ep108.c
@@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
 static void xlnx_ep108_init(MachineState *machine)
 {
     XlnxEP108 *s = g_new0(XlnxEP108, 1);
+    int i, j;
     Error *err = NULL;
 
     object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
@@ -60,6 +61,25 @@ static void xlnx_ep108_init(MachineState *machine)
                                          machine->ram_size);
     memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
 
+    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
+        SSIBus *spi_bus;
+        char bus_name[6];
+
+        snprintf(bus_name, 6, "spi%d", i);
+        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc.spi[i]),
+                                               bus_name);
+
+        for (j = 0; j < XLNX_ZYNQMP_NUM_SPI_FLASHES; ++j) {
+            DeviceState *flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
+            qemu_irq cs_line = qdev_get_gpio_in_named(flash_dev,
+                                                      SSI_GPIO_CS, 0);
+
+            sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]),
+                               i * XLNX_ZYNQMP_NUM_SPI_FLASHES + j,
+                               cs_line);
+        }
+    }
+
     xlnx_ep108_binfo.ram_size = machine->ram_size;
     xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
     xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
-- 
2.1.4

Re: [Qemu-devel] [PATCH v2 5/5] xlnx-ep108: Connect the SPI Flash

[Peter Crosthwaite]

On Wed, Oct 7, 2015 at 2:34 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> Connect the sst25wf080 SPI flash to the EP108 board.
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
> V2:
>  - Use sst25wf080 instead of m25p80
>
>  hw/arm/xlnx-ep108.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
>
> diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
> index 2899698..9755c30 100644
> --- a/hw/arm/xlnx-ep108.c
> +++ b/hw/arm/xlnx-ep108.c
> @@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
>  static void xlnx_ep108_init(MachineState *machine)
>  {
>      XlnxEP108 *s = g_new0(XlnxEP108, 1);
> +    int i, j;
>      Error *err = NULL;
>
>      object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
> @@ -60,6 +61,25 @@ static void xlnx_ep108_init(MachineState *machine)
>                                           machine->ram_size);
>      memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
>
> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
> +        SSIBus *spi_bus;
> +        char bus_name[6];
> +
> +        snprintf(bus_name, 6, "spi%d", i);
> +        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc.spi[i]),
> +                                               bus_name);

So machine level code shouldn't reach into the SoC like this. Instead
the bus should be passed from the SPI controller to SoC itself, then
use qdev_get_child_bus on the SoC itself.

Regards,
Peter

> +
> +        for (j = 0; j < XLNX_ZYNQMP_NUM_SPI_FLASHES; ++j) {
> +            DeviceState *flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
> +            qemu_irq cs_line = qdev_get_gpio_in_named(flash_dev,
> +                                                      SSI_GPIO_CS, 0);
> +
> +            sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]),
> +                               i * XLNX_ZYNQMP_NUM_SPI_FLASHES + j,
> +                               cs_line);
> +        }
> +    }
> +
>      xlnx_ep108_binfo.ram_size = machine->ram_size;
>      xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
>      xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
> --
> 2.1.4
>

Re: [Qemu-devel] [PATCH v2 5/5] xlnx-ep108: Connect the SPI Flash

[Alistair Francis]

On Wed, Oct 7, 2015 at 5:01 PM, Peter Crosthwaite
<crosthwaitepeter@gmail.com> wrote:
> On Wed, Oct 7, 2015 at 2:34 PM, Alistair Francis
> <alistair.francis@xilinx.com> wrote:
>> Connect the sst25wf080 SPI flash to the EP108 board.
>>
>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>> ---
>> V2:
>>  - Use sst25wf080 instead of m25p80
>>
>>  hw/arm/xlnx-ep108.c | 20 ++++++++++++++++++++
>>  1 file changed, 20 insertions(+)
>>
>> diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
>> index 2899698..9755c30 100644
>> --- a/hw/arm/xlnx-ep108.c
>> +++ b/hw/arm/xlnx-ep108.c
>> @@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
>>  static void xlnx_ep108_init(MachineState *machine)
>>  {
>>      XlnxEP108 *s = g_new0(XlnxEP108, 1);
>> +    int i, j;
>>      Error *err = NULL;
>>
>>      object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
>> @@ -60,6 +61,25 @@ static void xlnx_ep108_init(MachineState *machine)
>>                                           machine->ram_size);
>>      memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
>>
>> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
>> +        SSIBus *spi_bus;
>> +        char bus_name[6];
>> +
>> +        snprintf(bus_name, 6, "spi%d", i);
>> +        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc.spi[i]),
>> +                                               bus_name);
>
> So machine level code shouldn't reach into the SoC like this. Instead
> the bus should be passed from the SPI controller to SoC itself, then
> use qdev_get_child_bus on the SoC itself.

I'm not sure what you mean. The board needs multiple buses and I can't
see how it can do that without reaching into the SoC.

Thanks,

Alistair

>
> Regards,
> Peter
>
>> +
>> +        for (j = 0; j < XLNX_ZYNQMP_NUM_SPI_FLASHES; ++j) {
>> +            DeviceState *flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
>> +            qemu_irq cs_line = qdev_get_gpio_in_named(flash_dev,
>> +                                                      SSI_GPIO_CS, 0);
>> +
>> +            sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]),
>> +                               i * XLNX_ZYNQMP_NUM_SPI_FLASHES + j,
>> +                               cs_line);
>> +        }
>> +    }
>> +
>>      xlnx_ep108_binfo.ram_size = machine->ram_size;
>>      xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
>>      xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
>> --
>> 2.1.4
>>
>

Re: [Qemu-devel] [PATCH v2 5/5] xlnx-ep108: Connect the SPI Flash

[Alistair Francis]

On Thu, Oct 8, 2015 at 4:30 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> On Wed, Oct 7, 2015 at 5:01 PM, Peter Crosthwaite
> <crosthwaitepeter@gmail.com> wrote:
>> On Wed, Oct 7, 2015 at 2:34 PM, Alistair Francis
>> <alistair.francis@xilinx.com> wrote:
>>> Connect the sst25wf080 SPI flash to the EP108 board.
>>>
>>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>>> ---
>>> V2:
>>>  - Use sst25wf080 instead of m25p80
>>>
>>>  hw/arm/xlnx-ep108.c | 20 ++++++++++++++++++++
>>>  1 file changed, 20 insertions(+)
>>>
>>> diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
>>> index 2899698..9755c30 100644
>>> --- a/hw/arm/xlnx-ep108.c
>>> +++ b/hw/arm/xlnx-ep108.c
>>> @@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
>>>  static void xlnx_ep108_init(MachineState *machine)
>>>  {
>>>      XlnxEP108 *s = g_new0(XlnxEP108, 1);
>>> +    int i, j;
>>>      Error *err = NULL;
>>>
>>>      object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
>>> @@ -60,6 +61,25 @@ static void xlnx_ep108_init(MachineState *machine)
>>>                                           machine->ram_size);
>>>      memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
>>>
>>> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
>>> +        SSIBus *spi_bus;
>>> +        char bus_name[6];
>>> +
>>> +        snprintf(bus_name, 6, "spi%d", i);
>>> +        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc.spi[i]),
>>> +                                               bus_name);
>>
>> So machine level code shouldn't reach into the SoC like this. Instead
>> the bus should be passed from the SPI controller to SoC itself, then
>> use qdev_get_child_bus on the SoC itself.
>
> I'm not sure what you mean. The board needs multiple buses and I can't
> see how it can do that without reaching into the SoC.

Any updates on this?

Thanks,

Alistair

>
> Thanks,
>
> Alistair
>
>>
>> Regards,
>> Peter
>>
>>> +
>>> +        for (j = 0; j < XLNX_ZYNQMP_NUM_SPI_FLASHES; ++j) {
>>> +            DeviceState *flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
>>> +            qemu_irq cs_line = qdev_get_gpio_in_named(flash_dev,
>>> +                                                      SSI_GPIO_CS, 0);
>>> +
>>> +            sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]),
>>> +                               i * XLNX_ZYNQMP_NUM_SPI_FLASHES + j,
>>> +                               cs_line);
>>> +        }
>>> +    }
>>> +
>>>      xlnx_ep108_binfo.ram_size = machine->ram_size;
>>>      xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
>>>      xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
>>> --
>>> 2.1.4
>>>
>>

Re: [Qemu-devel] [PATCH v2 5/5] xlnx-ep108: Connect the SPI Flash

[Peter Crosthwaite]

On Thu, Oct 8, 2015 at 4:30 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> On Wed, Oct 7, 2015 at 5:01 PM, Peter Crosthwaite
> <crosthwaitepeter@gmail.com> wrote:
>> On Wed, Oct 7, 2015 at 2:34 PM, Alistair Francis
>> <alistair.francis@xilinx.com> wrote:
>>> Connect the sst25wf080 SPI flash to the EP108 board.
>>>
>>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>>> ---
>>> V2:
>>>  - Use sst25wf080 instead of m25p80
>>>
>>>  hw/arm/xlnx-ep108.c | 20 ++++++++++++++++++++
>>>  1 file changed, 20 insertions(+)
>>>
>>> diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
>>> index 2899698..9755c30 100644
>>> --- a/hw/arm/xlnx-ep108.c
>>> +++ b/hw/arm/xlnx-ep108.c
>>> @@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
>>>  static void xlnx_ep108_init(MachineState *machine)
>>>  {
>>>      XlnxEP108 *s = g_new0(XlnxEP108, 1);
>>> +    int i, j;
>>>      Error *err = NULL;
>>>
>>>      object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
>>> @@ -60,6 +61,25 @@ static void xlnx_ep108_init(MachineState *machine)
>>>                                           machine->ram_size);
>>>      memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
>>>
>>> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
>>> +        SSIBus *spi_bus;
>>> +        char bus_name[6];
>>> +
>>> +        snprintf(bus_name, 6, "spi%d", i);
>>> +        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc.spi[i]),
>>> +                                               bus_name);
>>
>> So machine level code shouldn't reach into the SoC like this. Instead
>> the bus should be passed from the SPI controller to SoC itself, then
>> use qdev_get_child_bus on the SoC itself.
>
> I'm not sure what you mean. The board needs multiple buses and I can't
> see how it can do that without reaching into the SoC.
>

The bus child object "spi0" should be a bus of the SoC, so the
instantiator of the SoC (ep108) does not need to reach into the SoC
implementation. You should end up with

        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), "spi0");

The bus should be exported by the SoC as a bus of its own to avoid
exposing internals. Not sure if we need some new QOM infrastructure to
support this yet. Wondering if you just QOM detach the child bus from
the SPI controller and reparent to the SoC. That however is non-ideal
as we ultimately want a mechanism whereby both a SoC and a board can
attach to a bus (mix of internal and external connections).

So I think the SPI bus as a child of the SPI controller needs to be
aliased to the SoC (might be similar to that prop aliasing stuff for
processors to MPCore). qdev_get_child_bus might need a patch to scan
for such aliases.

Alternatively, you could do the alias and then ditch
qdev_get_child_bus and use QOM APIs instead.

Regards,
Peter

> Thanks,
>
> Alistair
>
>>
>> Regards,
>> Peter
>>
>>> +
>>> +        for (j = 0; j < XLNX_ZYNQMP_NUM_SPI_FLASHES; ++j) {
>>> +            DeviceState *flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
>>> +            qemu_irq cs_line = qdev_get_gpio_in_named(flash_dev,
>>> +                                                      SSI_GPIO_CS, 0);
>>> +
>>> +            sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]),
>>> +                               i * XLNX_ZYNQMP_NUM_SPI_FLASHES + j,
>>> +                               cs_line);
>>> +        }
>>> +    }
>>> +
>>>      xlnx_ep108_binfo.ram_size = machine->ram_size;
>>>      xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
>>>      xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
>>> --
>>> 2.1.4
>>>
>>

Re: [Qemu-devel] [PATCH v2 5/5] xlnx-ep108: Connect the SPI Flash

[Alistair Francis]

On Wed, Oct 14, 2015 at 12:25 PM, Peter Crosthwaite
<crosthwaitepeter@gmail.com> wrote:
> On Thu, Oct 8, 2015 at 4:30 PM, Alistair Francis
> <alistair.francis@xilinx.com> wrote:
>> On Wed, Oct 7, 2015 at 5:01 PM, Peter Crosthwaite
>> <crosthwaitepeter@gmail.com> wrote:
>>> On Wed, Oct 7, 2015 at 2:34 PM, Alistair Francis
>>> <alistair.francis@xilinx.com> wrote:
>>>> Connect the sst25wf080 SPI flash to the EP108 board.
>>>>
>>>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>>>> ---
>>>> V2:
>>>>  - Use sst25wf080 instead of m25p80
>>>>
>>>>  hw/arm/xlnx-ep108.c | 20 ++++++++++++++++++++
>>>>  1 file changed, 20 insertions(+)
>>>>
>>>> diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
>>>> index 2899698..9755c30 100644
>>>> --- a/hw/arm/xlnx-ep108.c
>>>> +++ b/hw/arm/xlnx-ep108.c
>>>> @@ -33,6 +33,7 @@ static struct arm_boot_info xlnx_ep108_binfo;
>>>>  static void xlnx_ep108_init(MachineState *machine)
>>>>  {
>>>>      XlnxEP108 *s = g_new0(XlnxEP108, 1);
>>>> +    int i, j;
>>>>      Error *err = NULL;
>>>>
>>>>      object_initialize(&s->soc, sizeof(s->soc), TYPE_XLNX_ZYNQMP);
>>>> @@ -60,6 +61,25 @@ static void xlnx_ep108_init(MachineState *machine)
>>>>                                           machine->ram_size);
>>>>      memory_region_add_subregion(get_system_memory(), 0, &s->ddr_ram);
>>>>
>>>> +    for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
>>>> +        SSIBus *spi_bus;
>>>> +        char bus_name[6];
>>>> +
>>>> +        snprintf(bus_name, 6, "spi%d", i);
>>>> +        spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc.spi[i]),
>>>> +                                               bus_name);
>>>
>>> So machine level code shouldn't reach into the SoC like this. Instead
>>> the bus should be passed from the SPI controller to SoC itself, then
>>> use qdev_get_child_bus on the SoC itself.
>>
>> I'm not sure what you mean. The board needs multiple buses and I can't
>> see how it can do that without reaching into the SoC.
>>
>
> The bus child object "spi0" should be a bus of the SoC, so the
> instantiator of the SoC (ep108) does not need to reach into the SoC
> implementation. You should end up with
>
>         spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), "spi0");
>
> The bus should be exported by the SoC as a bus of its own to avoid
> exposing internals. Not sure if we need some new QOM infrastructure to
> support this yet. Wondering if you just QOM detach the child bus from
> the SPI controller and reparent to the SoC. That however is non-ideal
> as we ultimately want a mechanism whereby both a SoC and a board can
> attach to a bus (mix of internal and external connections).
>
> So I think the SPI bus as a child of the SPI controller needs to be
> aliased to the SoC (might be similar to that prop aliasing stuff for
> processors to MPCore). qdev_get_child_bus might need a patch to scan
> for such aliases.

Ok, this aliasing is tricky. the QOM infrastructure for aliases is
built on object propertys, which doesn't really help too much with
qdev buses/devices.

I was looking at adding a qdev_get_child_bus() similar function which
can find the devices children's buses as well, but that seems
difficult as well. Though it might be the best option.

I'm just not sure how yet... I'll look into that tomorrow

Thanks,

Alistair

>
> Alternatively, you could do the alias and then ditch
> qdev_get_child_bus and use QOM APIs instead.
>
> Regards,
> Peter
>
>> Thanks,
>>
>> Alistair
>>
>>>
>>> Regards,
>>> Peter
>>>
>>>> +
>>>> +        for (j = 0; j < XLNX_ZYNQMP_NUM_SPI_FLASHES; ++j) {
>>>> +            DeviceState *flash_dev = ssi_create_slave(spi_bus, "sst25wf080");
>>>> +            qemu_irq cs_line = qdev_get_gpio_in_named(flash_dev,
>>>> +                                                      SSI_GPIO_CS, 0);
>>>> +
>>>> +            sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]),
>>>> +                               i * XLNX_ZYNQMP_NUM_SPI_FLASHES + j,
>>>> +                               cs_line);
>>>> +        }
>>>> +    }
>>>> +
>>>>      xlnx_ep108_binfo.ram_size = machine->ram_size;
>>>>      xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
>>>>      xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
>>>> --
>>>> 2.1.4
>>>>
>>>
>