From: Alistair Francis <alistair23@gmail.com>
To: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
greentime.hu@sifive.com, vincent.chen@sifive.com,
frank.chang@sifive.com, jim.shu@sifive.com,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Weiwei Li <liwei1518@gmail.com>,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Subject: Re: [PATCH 1/1] hw/riscv/virt.c: fix the interrupts-extended property format of PLIC
Date: Thu, 4 Jan 2024 10:58:01 +1000 [thread overview]
Message-ID: <CAKmqyKNMhVyTOc5H+ndroygD9oxy+KENU0HO14XO_ZWnAmQEhg@mail.gmail.com> (raw)
In-Reply-To: <20231218090543.22353-1-yongxuan.wang@sifive.com>
On Mon, Dec 18, 2023 at 7:07 PM Yong-Xuan Wang <yongxuan.wang@sifive.com> wrote:
>
> The interrupts-extended property of PLIC only has 2 * hart number
> fields when KVM enabled, copy 4 * hart number fields to fdt will
> expose some uninitialized value.
>
> In this patch, I also refactor the code about the setting of
> interrupts-extended property of PLIC for improved readability.
>
> Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
> Reviewed-by: Jim Shu <jim.shu@sifive.com>
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
> hw/riscv/virt.c | 47 +++++++++++++++++++++++++++--------------------
> 1 file changed, 27 insertions(+), 20 deletions(-)
>
> diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
> index d2eac2415619..e42baf82cab6 100644
> --- a/hw/riscv/virt.c
> +++ b/hw/riscv/virt.c
> @@ -460,24 +460,6 @@ static void create_fdt_socket_plic(RISCVVirtState *s,
> "sifive,plic-1.0.0", "riscv,plic0"
> };
>
> - if (kvm_enabled()) {
> - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
> - } else {
> - plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4);
> - }
> -
> - for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
> - if (kvm_enabled()) {
> - plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
> - plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT);
> - } else {
> - plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]);
> - plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT);
> - plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]);
> - plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT);
> - }
> - }
> -
> plic_phandles[socket] = (*phandle)++;
> plic_addr = memmap[VIRT_PLIC].base + (memmap[VIRT_PLIC].size * socket);
> plic_name = g_strdup_printf("/soc/plic@%lx", plic_addr);
> @@ -490,8 +472,33 @@ static void create_fdt_socket_plic(RISCVVirtState *s,
> (char **)&plic_compat,
> ARRAY_SIZE(plic_compat));
> qemu_fdt_setprop(ms->fdt, plic_name, "interrupt-controller", NULL, 0);
> - qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended",
> - plic_cells, s->soc[socket].num_harts * sizeof(uint32_t) * 4);
> +
> + if (kvm_enabled()) {
> + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 2);
> +
> + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
> + plic_cells[cpu * 2 + 0] = cpu_to_be32(intc_phandles[cpu]);
> + plic_cells[cpu * 2 + 1] = cpu_to_be32(IRQ_S_EXT);
> + }
> +
> + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended",
> + plic_cells,
> + s->soc[socket].num_harts * sizeof(uint32_t) * 2);
> + } else {
> + plic_cells = g_new0(uint32_t, s->soc[socket].num_harts * 4);
> +
> + for (cpu = 0; cpu < s->soc[socket].num_harts; cpu++) {
> + plic_cells[cpu * 4 + 0] = cpu_to_be32(intc_phandles[cpu]);
> + plic_cells[cpu * 4 + 1] = cpu_to_be32(IRQ_M_EXT);
> + plic_cells[cpu * 4 + 2] = cpu_to_be32(intc_phandles[cpu]);
> + plic_cells[cpu * 4 + 3] = cpu_to_be32(IRQ_S_EXT);
> + }
> +
> + qemu_fdt_setprop(ms->fdt, plic_name, "interrupts-extended",
> + plic_cells,
> + s->soc[socket].num_harts * sizeof(uint32_t) * 4);
> + }
> +
> qemu_fdt_setprop_cells(ms->fdt, plic_name, "reg",
> 0x0, plic_addr, 0x0, memmap[VIRT_PLIC].size);
> qemu_fdt_setprop_cell(ms->fdt, plic_name, "riscv,ndev",
> --
> 2.17.1
>
>
prev parent reply other threads:[~2024-01-04 0:59 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-18 9:05 [PATCH 1/1] hw/riscv/virt.c: fix the interrupts-extended property format of PLIC Yong-Xuan Wang
2023-12-18 9:05 ` [PATCH 1/1] target/riscv/kvm.c: remove group setting of KVM AIA if the machine only has 1 socket Yong-Xuan Wang
2023-12-18 21:42 ` Daniel Henrique Barboza
2023-12-18 21:20 ` [PATCH 1/1] hw/riscv/virt.c: fix the interrupts-extended property format of PLIC Daniel Henrique Barboza
2024-01-04 0:58 ` Alistair Francis [this message]
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