From: Alistair Francis <alistair23@gmail.com>
To: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, palmer@dabbelt.com,
alistair.francis@wdc.com, dbarboza@ventanamicro.com,
liwei1518@gmail.com, bmeng.cn@gmail.com
Subject: Re: [PATCH v7 8/8] tests/avocado: Boot Linux for RV32 cpu on RV64 QEMU
Date: Tue, 8 Oct 2024 10:49:51 +1000 [thread overview]
Message-ID: <CAKmqyKNhS6zLPNLN4=-v_t01aOL4e9qK3BiYX7cMLAvhooGNjA@mail.gmail.com> (raw)
In-Reply-To: <20240919055048.562-9-zhiwei_liu@linux.alibaba.com>
On Thu, Sep 19, 2024 at 3:57 PM LIU Zhiwei <zhiwei_liu@linux.alibaba.com> wrote:
>
> make check-avocado AVOCADO_TESTS=tests/avocado/tuxrun_baselines.py: \
> TuxRunBaselineTest:test_riscv64_rv32
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
> Suggested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> tests/avocado/tuxrun_baselines.py | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/tests/avocado/tuxrun_baselines.py b/tests/avocado/tuxrun_baselines.py
> index 736e4aa289..589c7f254b 100644
> --- a/tests/avocado/tuxrun_baselines.py
> +++ b/tests/avocado/tuxrun_baselines.py
> @@ -533,6 +533,22 @@ def test_riscv64_maxcpu(self):
>
> self.common_tuxrun(csums=sums)
>
> + def test_riscv64_rv32(self):
> + """
> + :avocado: tags=arch:riscv64
> + :avocado: tags=machine:virt
> + :avocado: tags=tuxboot:riscv32
> + :avocado: tags=cpu:rv32
> + """
> + sums = { "Image" :
> + "89599407d7334de629a40e7ad6503c73670359eb5f5ae9d686353a3d6deccbd5",
> + "fw_jump.elf" :
> + "f2ef28a0b77826f79d085d3e4aa686f1159b315eff9099a37046b18936676985",
> + "rootfs.ext4.zst" :
> + "7168d296d0283238ea73cd5a775b3dd608e55e04c7b92b76ecce31bb13108cba" }
> +
> + self.common_tuxrun(csums=sums)
> +
> def test_s390(self):
> """
> :avocado: tags=arch:s390x
> --
> 2.43.0
>
>
next prev parent reply other threads:[~2024-10-08 0:50 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-19 5:50 [PATCH v7 0/8] target/riscv: Expose RV32 cpu to RV64 QEMU LIU Zhiwei
2024-09-19 5:50 ` [PATCH v7 1/8] target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI LIU Zhiwei
2024-09-19 5:50 ` [PATCH v7 2/8] target/riscv: Adjust PMP size for no-MMU RV64 QEMU running RV32 LIU Zhiwei
2024-09-19 5:50 ` [PATCH v7 3/8] target/riscv: Correct SXL return value for RV32 in RV64 QEMU LIU Zhiwei
2024-09-19 5:50 ` [PATCH v7 4/8] target/riscv: Detect sxl to set bit width for RV32 in RV64 LIU Zhiwei
2024-09-19 5:50 ` [PATCH v7 5/8] target/riscv: Correct mcause/scause bit width for RV32 in RV64 QEMU LIU Zhiwei
2024-09-19 5:50 ` [PATCH v7 6/8] target/riscv: Enable RV32 CPU support " LIU Zhiwei
2024-09-19 5:50 ` [PATCH v7 7/8] target/riscv: Add max32 CPU for " LIU Zhiwei
2024-09-26 21:54 ` Daniel Henrique Barboza
2024-10-08 0:49 ` Alistair Francis
2024-09-19 5:50 ` [PATCH v7 8/8] tests/avocado: Boot Linux for RV32 cpu on " LIU Zhiwei
2024-09-26 21:55 ` Daniel Henrique Barboza
2024-10-08 0:49 ` Alistair Francis [this message]
2024-10-08 1:17 ` [PATCH v7 0/8] target/riscv: Expose RV32 cpu to " Alistair Francis
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