Re: [Qemu-devel] [PATCH v7 10/13] xilinx_spips: Add support for 4 byte addresses in the LQSPI

[Alistair Francis <alistair23@gmail.com>]

On Thu, Nov 2, 2017 at 5:01 PM, Francisco Iglesias
<frasse.iglesias@gmail.com> wrote:
> Add support for 4 byte addresses in the LQSPI and correct LQSPI_CFG_SEP_BUS.
>
> Signed-off-by: Francisco Iglesias <frasse.iglesias@gmail.com>

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>

Alistair

> ---
>  hw/ssi/xilinx_spips.c | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
> index 3a98799..7f0f317 100644
> --- a/hw/ssi/xilinx_spips.c
> +++ b/hw/ssi/xilinx_spips.c
> @@ -92,8 +92,9 @@
>  #define R_LQSPI_CFG_RESET       0x03A002EB
>  #define LQSPI_CFG_LQ_MODE       (1U << 31)
>  #define LQSPI_CFG_TWO_MEM       (1 << 30)
> -#define LQSPI_CFG_SEP_BUS       (1 << 30)
> +#define LQSPI_CFG_SEP_BUS       (1 << 29)
>  #define LQSPI_CFG_U_PAGE        (1 << 28)
> +#define LQSPI_CFG_ADDR4         (1 << 27)
>  #define LQSPI_CFG_MODE_EN       (1 << 25)
>  #define LQSPI_CFG_MODE_WIDTH    8
>  #define LQSPI_CFG_MODE_SHIFT    16
> @@ -702,6 +703,9 @@ static void lqspi_load_cache(void *opaque, hwaddr addr)
>          fifo8_push(&s->tx_fifo, s->regs[R_LQSPI_CFG] & LQSPI_CFG_INST_CODE);
>          /* read address */
>          DB_PRINT_L(0, "pushing read address %06x\n", flash_addr);
> +        if (s->regs[R_LQSPI_CFG] & LQSPI_CFG_ADDR4) {
> +            fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 24));
> +        }
>          fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 16));
>          fifo8_push(&s->tx_fifo, (uint8_t)(flash_addr >> 8));
>          fifo8_push(&s->tx_fifo, (uint8_t)flash_addr);
> --
> 2.9.3
>
>