From: Alistair Francis <alistair23@gmail.com>
To: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: figlesia@xilinx.com, "Peter Maydell" <peter.maydell@linaro.org>,
"Edgar Iglesias" <edgar.iglesias@xilinx.com>,
"Sai Pavan Boddu" <sai.pavan.boddu@xilinx.com>,
"Francisco Iglesias" <frasse.iglesias@gmail.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Richard Henderson" <richard.henderson@linaro.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"KONRAD Frederic" <frederic.konrad@adacore.com>,
"Stefano Stabellini" <sstabellini@kernel.org>,
qemu-arm <qemu-arm@nongnu.org>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>,
"Luc Michel" <luc.michel@greensocs.com>
Subject: Re: [PATCH v1 1/5] target/microblaze: mbar: Transfer dc->rd to mbar_imm
Date: Mon, 17 Aug 2020 09:08:02 -0700 [thread overview]
Message-ID: <CAKmqyKNoWVxf0DPnNv0xOmhffGYmkVwqTwuvSKy0H5xvgotj_Q@mail.gmail.com> (raw)
In-Reply-To: <20200817140144.373403-2-edgar.iglesias@gmail.com>
On Mon, Aug 17, 2020 at 7:04 AM Edgar E. Iglesias
<edgar.iglesias@gmail.com> wrote:
>
> From: "Edgar E. Iglesias" <edgar.iglesias@xilinx.com>
>
> Transfer dc->rd to mbar_imm to improve the readability when
> comparing to the specs.
>
> No functional change.
>
> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/microblaze/translate.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
> index f6ff2591c3..47637f152b 100644
> --- a/target/microblaze/translate.c
> +++ b/target/microblaze/translate.c
> @@ -1229,8 +1229,10 @@ static void dec_br(DisasContext *dc)
> /* Memory barrier. */
> mbar = (dc->ir >> 16) & 31;
> if (mbar == 2 && dc->imm == 4) {
> + uint16_t mbar_imm = dc->rd;
> +
> /* mbar IMM & 16 decodes to sleep. */
> - if (dc->rd & 16) {
> + if (mbar_imm & 16) {
> TCGv_i32 tmp_hlt = tcg_const_i32(EXCP_HLT);
> TCGv_i32 tmp_1 = tcg_const_i32(1);
>
> @@ -1246,7 +1248,7 @@ static void dec_br(DisasContext *dc)
> tcg_temp_free_i32(tmp_1);
> return;
> }
> - LOG_DIS("mbar %d\n", dc->rd);
> + LOG_DIS("mbar %d\n", mbar_imm);
> /* Break the TB. */
> dc->cpustate_changed = 1;
> return;
> --
> 2.25.1
>
>
next prev parent reply other threads:[~2020-08-17 16:23 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-17 14:01 [PATCH v1 0/5] target/microblaze: Enable MTTCG Edgar E. Iglesias
2020-08-17 14:01 ` [PATCH v1 1/5] target/microblaze: mbar: Transfer dc->rd to mbar_imm Edgar E. Iglesias
2020-08-17 15:31 ` Richard Henderson
2020-08-17 16:08 ` Alistair Francis [this message]
2020-08-17 14:01 ` [PATCH v1 2/5] target/microblaze: mbar: Move LOG_DIS to before sleep Edgar E. Iglesias
2020-08-17 15:32 ` Richard Henderson
2020-08-17 16:08 ` Alistair Francis
2020-08-17 14:01 ` [PATCH v1 3/5] target/microblaze: mbar: Add support for data-access barriers Edgar E. Iglesias
2020-08-17 15:42 ` Richard Henderson
2020-08-17 17:03 ` Edgar E. Iglesias
2020-08-17 16:12 ` Alistair Francis
2020-08-17 14:01 ` [PATCH v1 4/5] target/microblaze: swx: Use atomic_cmpxchg Edgar E. Iglesias
2020-08-17 15:52 ` Richard Henderson
2020-08-17 15:59 ` Edgar E. Iglesias
2020-08-17 16:11 ` Alistair Francis
2020-08-17 14:01 ` [PATCH v1 5/5] configure: microblaze: Enable mttcg Edgar E. Iglesias
2020-08-17 16:07 ` Alistair Francis
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