* [PATCH 0/2] tcg: minor cleanups
@ 2025-02-16 2:47 Richard Henderson
2025-02-16 2:47 ` [PATCH 1/2] tcg/i386: Use tcg_{high, unsigned}_cond in tcg_out_brcond2 Richard Henderson
2025-02-16 2:47 ` [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64 Richard Henderson
0 siblings, 2 replies; 6+ messages in thread
From: Richard Henderson @ 2025-02-16 2:47 UTC (permalink / raw)
To: qemu-devel
Two minor patches extracted from a larger set.
r~
Richard Henderson (2):
tcg/i386: Use tcg_{high,unsigned}_cond in tcg_out_brcond2
tcg: Remove TCG_TARGET_HAS_{br,set}cond2 from riscv and loongarch64
tcg/loongarch64/tcg-target-has.h | 2 -
tcg/riscv/tcg-target-has.h | 2 -
tcg/i386/tcg-target.c.inc | 65 ++++----------------------------
3 files changed, 8 insertions(+), 61 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/2] tcg/i386: Use tcg_{high, unsigned}_cond in tcg_out_brcond2
2025-02-16 2:47 [PATCH 0/2] tcg: minor cleanups Richard Henderson
@ 2025-02-16 2:47 ` Richard Henderson
2025-02-16 18:44 ` Philippe Mathieu-Daudé
2025-02-16 2:47 ` [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64 Richard Henderson
1 sibling, 1 reply; 6+ messages in thread
From: Richard Henderson @ 2025-02-16 2:47 UTC (permalink / raw)
To: qemu-devel
Eliminate code repetition by using the appropriate helpers.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/i386/tcg-target.c.inc | 65 +++++----------------------------------
1 file changed, 8 insertions(+), 57 deletions(-)
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index cfea4c496d..33d303a123 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1658,6 +1658,7 @@ static void tcg_out_brcond2(TCGContext *s, const TCGArg *args,
tcg_out_brcond(s, 0, cond, args[1], args[3], const_args[3],
label_this, small);
break;
+
case TCG_COND_NE:
case TCG_COND_TSTNE:
tcg_out_brcond(s, 0, cond, args[0], args[2], const_args[2],
@@ -1665,64 +1666,14 @@ static void tcg_out_brcond2(TCGContext *s, const TCGArg *args,
tcg_out_brcond(s, 0, cond, args[1], args[3], const_args[3],
label_this, small);
break;
- case TCG_COND_LT:
- tcg_out_brcond(s, 0, TCG_COND_LT, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_LTU, args[0], args[2], const_args[2],
- label_this, small);
- break;
- case TCG_COND_LE:
- tcg_out_brcond(s, 0, TCG_COND_LT, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_LEU, args[0], args[2], const_args[2],
- label_this, small);
- break;
- case TCG_COND_GT:
- tcg_out_brcond(s, 0, TCG_COND_GT, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_GTU, args[0], args[2], const_args[2],
- label_this, small);
- break;
- case TCG_COND_GE:
- tcg_out_brcond(s, 0, TCG_COND_GT, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_GEU, args[0], args[2], const_args[2],
- label_this, small);
- break;
- case TCG_COND_LTU:
- tcg_out_brcond(s, 0, TCG_COND_LTU, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_LTU, args[0], args[2], const_args[2],
- label_this, small);
- break;
- case TCG_COND_LEU:
- tcg_out_brcond(s, 0, TCG_COND_LTU, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_LEU, args[0], args[2], const_args[2],
- label_this, small);
- break;
- case TCG_COND_GTU:
- tcg_out_brcond(s, 0, TCG_COND_GTU, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_GTU, args[0], args[2], const_args[2],
- label_this, small);
- break;
- case TCG_COND_GEU:
- tcg_out_brcond(s, 0, TCG_COND_GTU, args[1], args[3], const_args[3],
- label_this, small);
- tcg_out_jxx(s, JCC_JNE, label_next, 1);
- tcg_out_brcond(s, 0, TCG_COND_GEU, args[0], args[2], const_args[2],
- label_this, small);
- break;
+
default:
- g_assert_not_reached();
+ tcg_out_brcond(s, 0, tcg_high_cond(cond), args[1],
+ args[3], const_args[3], label_this, small);
+ tcg_out_jxx(s, JCC_JNE, label_next, 1);
+ tcg_out_brcond(s, 0, tcg_unsigned_cond(cond), args[0],
+ args[2], const_args[2], label_this, small);
+ break;
}
tcg_out_label(s, label_next);
}
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64
2025-02-16 2:47 [PATCH 0/2] tcg: minor cleanups Richard Henderson
2025-02-16 2:47 ` [PATCH 1/2] tcg/i386: Use tcg_{high, unsigned}_cond in tcg_out_brcond2 Richard Henderson
@ 2025-02-16 2:47 ` Richard Henderson
2025-02-16 19:04 ` Philippe Mathieu-Daudé
2025-02-17 0:42 ` Alistair Francis
1 sibling, 2 replies; 6+ messages in thread
From: Richard Henderson @ 2025-02-16 2:47 UTC (permalink / raw)
To: qemu-devel
These defines never should have been added as they were
never used. Only 32-bit hosts may have these opcodes and
they have them unconditionally.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target-has.h | 2 --
tcg/riscv/tcg-target-has.h | 2 --
2 files changed, 4 deletions(-)
diff --git a/tcg/loongarch64/tcg-target-has.h b/tcg/loongarch64/tcg-target-has.h
index ac88522eef..188b00799f 100644
--- a/tcg/loongarch64/tcg-target-has.h
+++ b/tcg/loongarch64/tcg-target-has.h
@@ -37,8 +37,6 @@
#define TCG_TARGET_HAS_clz_i32 1
#define TCG_TARGET_HAS_ctz_i32 1
#define TCG_TARGET_HAS_ctpop_i32 0
-#define TCG_TARGET_HAS_brcond2 0
-#define TCG_TARGET_HAS_setcond2 0
#define TCG_TARGET_HAS_qemu_st8_i32 0
/* 64-bit operations */
diff --git a/tcg/riscv/tcg-target-has.h b/tcg/riscv/tcg-target-has.h
index f35f9b31f5..98081084f2 100644
--- a/tcg/riscv/tcg-target-has.h
+++ b/tcg/riscv/tcg-target-has.h
@@ -37,8 +37,6 @@
#define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB)
#define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB)
#define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB)
-#define TCG_TARGET_HAS_brcond2 1
-#define TCG_TARGET_HAS_setcond2 1
#define TCG_TARGET_HAS_qemu_st8_i32 0
#define TCG_TARGET_HAS_negsetcond_i64 1
--
2.43.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] tcg/i386: Use tcg_{high, unsigned}_cond in tcg_out_brcond2
2025-02-16 2:47 ` [PATCH 1/2] tcg/i386: Use tcg_{high, unsigned}_cond in tcg_out_brcond2 Richard Henderson
@ 2025-02-16 18:44 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-16 18:44 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 16/2/25 03:47, Richard Henderson wrote:
> Eliminate code repetition by using the appropriate helpers.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/i386/tcg-target.c.inc | 65 +++++----------------------------------
> 1 file changed, 8 insertions(+), 57 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64
2025-02-16 2:47 ` [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64 Richard Henderson
@ 2025-02-16 19:04 ` Philippe Mathieu-Daudé
2025-02-17 0:42 ` Alistair Francis
1 sibling, 0 replies; 6+ messages in thread
From: Philippe Mathieu-Daudé @ 2025-02-16 19:04 UTC (permalink / raw)
To: Richard Henderson, qemu-devel
On 16/2/25 03:47, Richard Henderson wrote:
> These defines never should have been added as they were
> never used. Only 32-bit hosts may have these opcodes and
> they have them unconditionally.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/loongarch64/tcg-target-has.h | 2 --
> tcg/riscv/tcg-target-has.h | 2 --
> 2 files changed, 4 deletions(-)
>
> diff --git a/tcg/loongarch64/tcg-target-has.h b/tcg/loongarch64/tcg-target-has.h
> index ac88522eef..188b00799f 100644
> --- a/tcg/loongarch64/tcg-target-has.h
> +++ b/tcg/loongarch64/tcg-target-has.h
> @@ -37,8 +37,6 @@
> #define TCG_TARGET_HAS_clz_i32 1
> #define TCG_TARGET_HAS_ctz_i32 1
> #define TCG_TARGET_HAS_ctpop_i32 0
> -#define TCG_TARGET_HAS_brcond2 0
> -#define TCG_TARGET_HAS_setcond2 0
> #define TCG_TARGET_HAS_qemu_st8_i32 0
Fixes: 6cb14e4de29 ("tcg/loongarch64: Add the tcg-target.h file")
Missed in 0a16d036154 ("tcg/loongarch64: Extract TCG_TARGET_HAS_foo defs
to 'tcg-target-has.h'")
> diff --git a/tcg/riscv/tcg-target-has.h b/tcg/riscv/tcg-target-has.h
> index f35f9b31f5..98081084f2 100644
> --- a/tcg/riscv/tcg-target-has.h
> +++ b/tcg/riscv/tcg-target-has.h
> @@ -37,8 +37,6 @@
> #define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB)
> #define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB)
> #define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB)
> -#define TCG_TARGET_HAS_brcond2 1
> -#define TCG_TARGET_HAS_setcond2 1
> #define TCG_TARGET_HAS_qemu_st8_i32 0
Fixes: fb1f70f3685 ("tcg/riscv: Add the tcg-target.h file")
Missed in 0242532b45d ("tcg/riscv: Extract TCG_TARGET_HAS_foo defs to
'tcg-target-has.h'")
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64
2025-02-16 2:47 ` [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64 Richard Henderson
2025-02-16 19:04 ` Philippe Mathieu-Daudé
@ 2025-02-17 0:42 ` Alistair Francis
1 sibling, 0 replies; 6+ messages in thread
From: Alistair Francis @ 2025-02-17 0:42 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
On Sun, Feb 16, 2025 at 12:49 PM Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> These defines never should have been added as they were
> never used. Only 32-bit hosts may have these opcodes and
> they have them unconditionally.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> tcg/loongarch64/tcg-target-has.h | 2 --
> tcg/riscv/tcg-target-has.h | 2 --
> 2 files changed, 4 deletions(-)
>
> diff --git a/tcg/loongarch64/tcg-target-has.h b/tcg/loongarch64/tcg-target-has.h
> index ac88522eef..188b00799f 100644
> --- a/tcg/loongarch64/tcg-target-has.h
> +++ b/tcg/loongarch64/tcg-target-has.h
> @@ -37,8 +37,6 @@
> #define TCG_TARGET_HAS_clz_i32 1
> #define TCG_TARGET_HAS_ctz_i32 1
> #define TCG_TARGET_HAS_ctpop_i32 0
> -#define TCG_TARGET_HAS_brcond2 0
> -#define TCG_TARGET_HAS_setcond2 0
> #define TCG_TARGET_HAS_qemu_st8_i32 0
>
> /* 64-bit operations */
> diff --git a/tcg/riscv/tcg-target-has.h b/tcg/riscv/tcg-target-has.h
> index f35f9b31f5..98081084f2 100644
> --- a/tcg/riscv/tcg-target-has.h
> +++ b/tcg/riscv/tcg-target-has.h
> @@ -37,8 +37,6 @@
> #define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB)
> #define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB)
> #define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB)
> -#define TCG_TARGET_HAS_brcond2 1
> -#define TCG_TARGET_HAS_setcond2 1
> #define TCG_TARGET_HAS_qemu_st8_i32 0
>
> #define TCG_TARGET_HAS_negsetcond_i64 1
> --
> 2.43.0
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-02-17 0:43 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-02-16 2:47 [PATCH 0/2] tcg: minor cleanups Richard Henderson
2025-02-16 2:47 ` [PATCH 1/2] tcg/i386: Use tcg_{high, unsigned}_cond in tcg_out_brcond2 Richard Henderson
2025-02-16 18:44 ` Philippe Mathieu-Daudé
2025-02-16 2:47 ` [PATCH 2/2] tcg: Remove TCG_TARGET_HAS_{br, set}cond2 from riscv and loongarch64 Richard Henderson
2025-02-16 19:04 ` Philippe Mathieu-Daudé
2025-02-17 0:42 ` Alistair Francis
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