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From: Alistair Francis <alistair23@gmail.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: Peter Maydell <peter.maydell@linaro.org>,
	Grant Likely <grant.likely@arm.com>,
	Jason Wang <jasowang@redhat.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v5 2/7] hw/mdio: Add PHY register definition
Date: Tue, 27 Feb 2018 14:31:43 -0800	[thread overview]
Message-ID: <CAKmqyKNxnfSyUzzo5=2VyvM86osApVzyRVCGpE2qhzAefZpALg@mail.gmail.com> (raw)
In-Reply-To: <20170922171323.10348-3-f4bug@amsat.org>

On Fri, Sep 22, 2017 at 10:13 AM, Philippe Mathieu-Daudé
<f4bug@amsat.org> wrote:
> From: Grant Likely <grant.likely@arm.com>
>
> Trivial patch to add #defines for defined PHY register address and bit fields
>
> Signed-off-by: Grant Likely <grant.likely@arm.com>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>

Alistair

> ---
>  include/hw/net/mdio.h | 24 ++++++++++++++++++++++--
>  hw/net/mdio.c         |  8 ++++----
>  2 files changed, 26 insertions(+), 6 deletions(-)
>
> diff --git a/include/hw/net/mdio.h b/include/hw/net/mdio.h
> index ac36aed3c3..7ffa4389b9 100644
> --- a/include/hw/net/mdio.h
> +++ b/include/hw/net/mdio.h
> @@ -25,14 +25,34 @@
>   * THE SOFTWARE.
>   */
>
> -/* PHY Advertisement control register */
> +/* PHY MII Register/Bit Definitions */
> +/* PHY Registers defined by IEEE */
> +#define PHY_CTRL         0x00 /* Control Register */
> +#define PHY_STATUS       0x01 /* Status Regiser */
> +#define PHY_ID1          0x02 /* Phy Id Reg (word 1) */
> +#define PHY_ID2          0x03 /* Phy Id Reg (word 2) */
> +#define PHY_AUTONEG_ADV  0x04 /* Autoneg Advertisement */
> +#define PHY_LP_ABILITY   0x05 /* Link Partner Ability (Base Page) */
> +#define PHY_AUTONEG_EXP  0x06 /* Autoneg Expansion Reg */
> +#define PHY_NEXT_PAGE_TX 0x07 /* Next Page TX */
> +#define PHY_LP_NEXT_PAGE 0x08 /* Link Partner Next Page */
> +#define PHY_1000T_CTRL   0x09 /* 1000Base-T Control Reg */
> +#define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Reg */
> +#define PHY_EXT_STATUS   0x0F /* Extended Status Reg */
> +
> +#define NUM_PHY_REGS     0x20  /* 5 bit address bus (0-0x1F) */
> +
> +#define PHY_CTRL_RST            0x8000 /* PHY reset command */
> +#define PHY_CTRL_ANEG_RST       0x0200 /* Autonegotiation reset command */
> +
> +/* PHY Advertisement control and remote capability registers (same bitfields) */
>  #define PHY_ADVERTISE_10HALF    0x0020  /* Try for 10mbps half-duplex  */
>  #define PHY_ADVERTISE_10FULL    0x0040  /* Try for 10mbps full-duplex  */
>  #define PHY_ADVERTISE_100HALF   0x0080  /* Try for 100mbps half-duplex */
>  #define PHY_ADVERTISE_100FULL   0x0100  /* Try for 100mbps full-duplex */
>
>  struct qemu_phy {
> -    uint32_t regs[32];
> +    uint32_t regs[NUM_PHY_REGS];
>
>      int link;
>
> diff --git a/hw/net/mdio.c b/hw/net/mdio.c
> index 3763fcc8af..3d70d99077 100644
> --- a/hw/net/mdio.c
> +++ b/hw/net/mdio.c
> @@ -122,12 +122,12 @@ static void tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data)
>
>  void tdk_init(struct qemu_phy *phy)
>  {
> -    phy->regs[0] = 0x3100;
> +    phy->regs[PHY_CTRL] = 0x3100;
>      /* PHY Id. */
> -    phy->regs[2] = 0x0300;
> -    phy->regs[3] = 0xe400;
> +    phy->regs[PHY_ID1] = 0x0300;
> +    phy->regs[PHY_ID2] = 0xe400;
>      /* Autonegotiation advertisement reg. */
> -    phy->regs[4] = 0x01e1;
> +    phy->regs[PHY_AUTONEG_ADV] = 0x01e1;
>      phy->link = 1;
>
>      phy->read = tdk_read;
> --
> 2.14.1
>
>

  reply	other threads:[~2018-02-27 22:32 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-22 17:13 [Qemu-devel] [PATCH v5 0/7] Generalize MDIO framework Philippe Mathieu-Daudé
2017-09-22 17:13 ` [Qemu-devel] [PATCH v5 1/7] hw/mdio: Generalize etraxfs MDIO bitbanging emulation Philippe Mathieu-Daudé
2018-02-27 22:30   ` Alistair Francis
2017-09-22 17:13 ` [Qemu-devel] [PATCH v5 2/7] hw/mdio: Add PHY register definition Philippe Mathieu-Daudé
2018-02-27 22:31   ` Alistair Francis [this message]
2017-09-22 17:13 ` [Qemu-devel] [PATCH v5 3/7] hw/mdio: Generalize phy initialization routine Philippe Mathieu-Daudé
2018-02-27 22:33   ` Alistair Francis
2018-05-28  3:09     ` Philippe Mathieu-Daudé
2017-09-22 17:13 ` [Qemu-devel] [PATCH v5 4/7] hw/mdio: Mask out read-only bits Philippe Mathieu-Daudé
2018-02-27 22:37   ` Alistair Francis
2017-09-22 17:13 ` [Qemu-devel] [PATCH v5 5/7] hw/mdio: Refactor bitbanging state machine Philippe Mathieu-Daudé
2018-02-27 22:40   ` Alistair Francis
2017-09-22 17:13 ` [Qemu-devel] [PATCH v5 6/7] hw/mdio: Add VMState support Philippe Mathieu-Daudé
2018-02-27 22:42   ` Alistair Francis
2017-09-22 17:13 ` [Qemu-devel] [PATCH v5 7/7] hw/mdio: Use bitbang core for smc91c111 network device Philippe Mathieu-Daudé
2017-09-22 17:19 ` [Qemu-devel] [PATCH v5 0/7] Generalize MDIO framework Alistair Francis
2017-10-09 13:21 ` Edgar E. Iglesias
2018-02-27 23:18   ` Philippe Mathieu-Daudé

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