Re: [PATCH for-10.0 07/11] hw/riscv/riscv-iommu: add IOHPMCYCLES mmio write

[Alistair Francis <alistair23@gmail.com>]

On Thu, Dec 5, 2024 at 11:34 PM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> From: Tomasz Jeznach <tjeznach@rivosinc.com>
>
> RISCV_IOMMU_REG_IOHPMCYCLES writes are done by
> riscv_iommu_process_hpmcycle_write(), called by the mmio write callback
> via riscv_iommu_process_hpm_writes().
>
> Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/riscv/riscv-iommu-hpm.c | 19 +++++++++++++++++++
>  hw/riscv/riscv-iommu-hpm.h |  1 +
>  hw/riscv/riscv-iommu.c     |  2 +-
>  3 files changed, 21 insertions(+), 1 deletion(-)
>
> diff --git a/hw/riscv/riscv-iommu-hpm.c b/hw/riscv/riscv-iommu-hpm.c
> index 70814b942d..1cea6b1df1 100644
> --- a/hw/riscv/riscv-iommu-hpm.c
> +++ b/hw/riscv/riscv-iommu-hpm.c
> @@ -262,3 +262,22 @@ void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh)
>          timer_del(s->hpm_timer);
>      }
>  }
> +
> +void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s)
> +{
> +    const uint64_t val = riscv_iommu_reg_get64(s, RISCV_IOMMU_REG_IOHPMCYCLES);
> +    const uint32_t ovf = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_IOCOUNTOVF);
> +
> +    /*
> +     * Clear OF bit in IOCNTOVF if it's being cleared in IOHPMCYCLES register.
> +     */
> +    if (get_field(ovf, RISCV_IOMMU_IOCOUNTOVF_CY) &&
> +        !get_field(val, RISCV_IOMMU_IOHPMCYCLES_OVF)) {
> +        riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_IOCOUNTOVF, 0,
> +            RISCV_IOMMU_IOCOUNTOVF_CY);
> +    }
> +
> +    s->hpmcycle_val = val & ~RISCV_IOMMU_IOHPMCYCLES_OVF;
> +    s->hpmcycle_prev = get_cycles();
> +    hpm_setup_timer(s, s->hpmcycle_val);
> +}
> diff --git a/hw/riscv/riscv-iommu-hpm.h b/hw/riscv/riscv-iommu-hpm.h
> index ee888650fb..0cd550975d 100644
> --- a/hw/riscv/riscv-iommu-hpm.h
> +++ b/hw/riscv/riscv-iommu-hpm.h
> @@ -27,5 +27,6 @@ void riscv_iommu_hpm_incr_ctr(RISCVIOMMUState *s, RISCVIOMMUContext *ctx,
>                                unsigned event_id);
>  void riscv_iommu_hpm_timer_cb(void *priv);
>  void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh);
> +void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s);
>
>  #endif
> diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
> index 56ec2d6d42..3bdd88df4a 100644
> --- a/hw/riscv/riscv-iommu.c
> +++ b/hw/riscv/riscv-iommu.c
> @@ -1934,7 +1934,7 @@ static void riscv_iommu_process_hpm_writes(RISCVIOMMUState *s,
>
>      case RISCV_IOMMU_REG_IOHPMCYCLES:
>      case RISCV_IOMMU_REG_IOHPMCYCLES + 4:
> -        /* not yet implemented */
> +        riscv_iommu_process_hpmcycle_write(s);
>          break;
>
>      case RISCV_IOMMU_REG_IOHPMEVT_BASE ...
> --
> 2.47.1
>
>