From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59559) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZWWda-0005Kk-4D for qemu-devel@nongnu.org; Mon, 31 Aug 2015 17:29:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZWWdY-0003zp-TR for qemu-devel@nongnu.org; Mon, 31 Aug 2015 17:29:09 -0400 Received: from mail-oi0-x22e.google.com ([2607:f8b0:4003:c06::22e]:33025) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZWWdY-0003zh-OY for qemu-devel@nongnu.org; Mon, 31 Aug 2015 17:29:08 -0400 Received: by oigm66 with SMTP id m66so67042952oig.0 for ; Mon, 31 Aug 2015 14:29:08 -0700 (PDT) MIME-Version: 1.0 Sender: alistair23@gmail.com In-Reply-To: <55E4BF04.3070701@redhat.com> References: <6e0045ed58a395ec0e3caa1c1abf478b41e5023b.1440806502.git.alistair.francis@xilinx.com> <55E4BF04.3070701@redhat.com> From: Alistair Francis Date: Mon, 31 Aug 2015 14:28:38 -0700 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: Re: [Qemu-devel] [PATCH v6 4/4] xlnx-zynqmp: Connect the sysbus AHCI to ZynqMP List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: John Snow Cc: Edgar Iglesias , Peter Maydell , "qemu-devel@nongnu.org Developers" , Alistair Francis , Sai Pavan Boddu , Peter Crosthwaite , =?UTF-8?Q?Andreas_F=C3=A4rber?= On Mon, Aug 31, 2015 at 1:54 PM, John Snow wrote: > > > On 08/28/2015 08:04 PM, Alistair Francis wrote: >> Connect the Sysbus AHCI device to ZynqMP. >> >> Signed-off-by: Alistair Francis >> Reviewed-by: Sai Pavan Boddu >> --- >> V6: >> - Fix up Macros >> V2: >> - Marcoify the number of SATA prts >> - Change the error for setting num-ports to error_abort >> >> hw/arm/xlnx-zynqmp.c | 18 ++++++++++++++++++ >> include/hw/arm/xlnx-zynqmp.h | 3 +++ >> 2 files changed, 21 insertions(+), 0 deletions(-) >> >> diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c >> index 6756c74..90b2aca 100644 >> --- a/hw/arm/xlnx-zynqmp.c >> +++ b/hw/arm/xlnx-zynqmp.c >> @@ -28,6 +28,10 @@ >> #define GIC_DIST_ADDR 0xf9010000 >> #define GIC_CPU_ADDR 0xf9020000 >> >> +#define SATA_INTR 133 >> +#define SATA_ADDR 0xFD0C0000 >> +#define SATA_NUM_PORTS 2 >> + >> static const uint64_t gem_addr[XLNX_ZYNQMP_NUM_GEMS] = { >> 0xFF0B0000, 0xFF0C0000, 0xFF0D0000, 0xFF0E0000, >> }; >> @@ -90,6 +94,9 @@ static void xlnx_zynqmp_init(Object *obj) >> object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_CADENCE_UART); >> qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default()); >> } >> + >> + object_initialize(&s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI); >> + qdev_set_parent_bus(DEVICE(&s->sata), sysbus_get_default()); >> } >> >> static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) >> @@ -240,6 +247,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) >> sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, >> gic_spi[uart_intr[i]]); >> } >> + >> + object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports", >> + &error_abort); >> + object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); >> + if (err) { >> + error_propagate((errp), (err)); >> + return; >> + } >> + >> + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR); >> + sysbus_connect_irq(SYS_BUS_DEVICE(&s->sata), 0, gic_spi[SATA_INTR]); >> } >> >> static Property xlnx_zynqmp_props[] = { >> diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h >> index 6ccb57b..97622ec 100644 >> --- a/include/hw/arm/xlnx-zynqmp.h >> +++ b/include/hw/arm/xlnx-zynqmp.h >> @@ -22,6 +22,8 @@ >> #include "hw/intc/arm_gic.h" >> #include "hw/net/cadence_gem.h" >> #include "hw/char/cadence_uart.h" >> +#include "hw/ide/pci.h" >> +#include "hw/ide/ahci.h" >> >> #define TYPE_XLNX_ZYNQMP "xlnx,zynqmp" >> #define XLNX_ZYNQMP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \ >> @@ -60,6 +62,7 @@ typedef struct XlnxZynqMPState { >> >> CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS]; >> CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS]; >> + SysbusAHCIState sata; >> >> char *boot_cpu; >> ARMCPU *boot_cpu_ptr; >> > > For some reason, this patch never made it to the qemu-devel archives for > either v5 or v6. I only received a direct copy to my inbox, but the > mailer daemon seems to have dropped this patch for ... some reason or > another. I just noticed the same thing. I talked to Xilinx IT and they say that the email was delivered from our servers. Is there a way to check to see what happened on the QEMU mailing list side? Thanks, Alistair > > --js >