[PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state

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* [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
@ 2023-04-13 13:34 Ivan Klokov
  2023-04-13 16:02 ` Anup Patel
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Ivan Klokov @ 2023-04-13 13:34 UTC (permalink / raw)
  To: qemu-devel
  Cc: qemu-riscv, richard.henderson, anup, anup.patel, palmer,
	alistair.francis, Ivan Klokov

Since g_new is used to initialize the RISCVAPLICState->state structure,
in some case we get behavior that is not as expected. This patch
changes this to g_new0, which allows to initialize the APLIC in the correct state.

Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>
---
 hw/intc/riscv_aplic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index cfd007e629..71591d44bf 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
 
     aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
     aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
-    aplic->state = g_new(uint32_t, aplic->num_irqs);
+    aplic->state = g_new0(uint32_t, aplic->num_irqs);
     aplic->target = g_new0(uint32_t, aplic->num_irqs);
     if (!aplic->msimode) {
         for (i = 0; i < aplic->num_irqs; i++) {
-- 
2.34.1



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
  2023-04-13 13:34 [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state Ivan Klokov
@ 2023-04-13 16:02 ` Anup Patel
  2023-04-17  2:28 ` Alistair Francis
  2023-04-17  2:28 ` Alistair Francis
  2 siblings, 0 replies; 4+ messages in thread
From: Anup Patel @ 2023-04-13 16:02 UTC (permalink / raw)
  To: Ivan Klokov
  Cc: qemu-devel, qemu-riscv, richard.henderson, anup.patel, palmer,
	alistair.francis

On Thu, Apr 13, 2023 at 7:04 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> Since g_new is used to initialize the RISCVAPLICState->state structure,
> in some case we get behavior that is not as expected. This patch
> changes this to g_new0, which allows to initialize the APLIC in the correct state.
>
> Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>

Looks good to me.

Reviewed-by: Anup Patel <anup@brainfault.org>

Regards,
Anup

> ---
>  hw/intc/riscv_aplic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index cfd007e629..71591d44bf 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
>
>      aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
>      aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
> -    aplic->state = g_new(uint32_t, aplic->num_irqs);
> +    aplic->state = g_new0(uint32_t, aplic->num_irqs);
>      aplic->target = g_new0(uint32_t, aplic->num_irqs);
>      if (!aplic->msimode) {
>          for (i = 0; i < aplic->num_irqs; i++) {
> --
> 2.34.1
>


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
  2023-04-13 13:34 [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state Ivan Klokov
  2023-04-13 16:02 ` Anup Patel
@ 2023-04-17  2:28 ` Alistair Francis
  2023-04-17  2:28 ` Alistair Francis
  2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2023-04-17  2:28 UTC (permalink / raw)
  To: Ivan Klokov
  Cc: qemu-devel, qemu-riscv, richard.henderson, anup, anup.patel,
	palmer, alistair.francis

On Thu, Apr 13, 2023 at 11:35 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> Since g_new is used to initialize the RISCVAPLICState->state structure,
> in some case we get behavior that is not as expected. This patch
> changes this to g_new0, which allows to initialize the APLIC in the correct state.
>
> Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/intc/riscv_aplic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index cfd007e629..71591d44bf 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
>
>      aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
>      aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
> -    aplic->state = g_new(uint32_t, aplic->num_irqs);
> +    aplic->state = g_new0(uint32_t, aplic->num_irqs);
>      aplic->target = g_new0(uint32_t, aplic->num_irqs);
>      if (!aplic->msimode) {
>          for (i = 0; i < aplic->num_irqs; i++) {
> --
> 2.34.1
>
>


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state
  2023-04-13 13:34 [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state Ivan Klokov
  2023-04-13 16:02 ` Anup Patel
  2023-04-17  2:28 ` Alistair Francis
@ 2023-04-17  2:28 ` Alistair Francis
  2 siblings, 0 replies; 4+ messages in thread
From: Alistair Francis @ 2023-04-17  2:28 UTC (permalink / raw)
  To: Ivan Klokov
  Cc: qemu-devel, qemu-riscv, richard.henderson, anup, anup.patel,
	palmer, alistair.francis

On Thu, Apr 13, 2023 at 11:35 PM Ivan Klokov <ivan.klokov@syntacore.com> wrote:
>
> Since g_new is used to initialize the RISCVAPLICState->state structure,
> in some case we get behavior that is not as expected. This patch
> changes this to g_new0, which allows to initialize the APLIC in the correct state.
>
> Signed-off-by: Ivan Klokov <ivan.klokov@syntacore.com>

Thanks!

Applied to riscv-to-apply.next

Alistair

> ---
>  hw/intc/riscv_aplic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
> index cfd007e629..71591d44bf 100644
> --- a/hw/intc/riscv_aplic.c
> +++ b/hw/intc/riscv_aplic.c
> @@ -803,7 +803,7 @@ static void riscv_aplic_realize(DeviceState *dev, Error **errp)
>
>      aplic->bitfield_words = (aplic->num_irqs + 31) >> 5;
>      aplic->sourcecfg = g_new0(uint32_t, aplic->num_irqs);
> -    aplic->state = g_new(uint32_t, aplic->num_irqs);
> +    aplic->state = g_new0(uint32_t, aplic->num_irqs);
>      aplic->target = g_new0(uint32_t, aplic->num_irqs);
>      if (!aplic->msimode) {
>          for (i = 0; i < aplic->num_irqs; i++) {
> --
> 2.34.1
>
>


^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2023-04-17  2:29 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2023-04-13 13:34 [PATCH] hw/intc/riscv_aplic: Zero init APLIC internal state Ivan Klokov
2023-04-13 16:02 ` Anup Patel
2023-04-17  2:28 ` Alistair Francis
2023-04-17  2:28 ` Alistair Francis

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