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From: Alistair Francis <alistair23@gmail.com>
To: Atish Patra <atishp@rivosinc.com>
Cc: "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <Alistair.Francis@wdc.com>,
	 Bin Meng <bin.meng@windriver.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	 "open list:RISC-V" <qemu-riscv@nongnu.org>
Subject: Re: [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton
Date: Mon, 25 Jul 2022 11:14:08 +1000	[thread overview]
Message-ID: <CAKmqyKODh+im_v2NJhRcYgeaYmvDS9BXW++RaOzEb9oQD53zKw@mail.gmail.com> (raw)
In-Reply-To: <20220723090335.671105-1-atishp@rivosinc.com>

On Sat, Jul 23, 2022 at 7:22 PM Atish Patra <atishp@rivosinc.com> wrote:
>
> Since commit 40244040a7ac, multi-socket configuration with plic is
> broken as the hartid for second socket is calculated incorrectly.
> The hartid stored in addr_config already includes the offset
> for the base hartid for that socket. Adding it again would lead
> to segfault while creating the plic device for the virt machine.
> qdev_connect_gpio_out was also invoked with incorrect number of gpio
> lines.
>
> Fixes: 40244040a7ac (hw/intc: sifive_plic: Avoid overflowing the addr_config buffer)
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>

Can you share the -cpu options that causes the segfault? I'll add it
to my test case

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  hw/intc/sifive_plic.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c
> index 56d60e9ac935..fdac028a521f 100644
> --- a/hw/intc/sifive_plic.c
> +++ b/hw/intc/sifive_plic.c
> @@ -454,10 +454,10 @@ DeviceState *sifive_plic_create(hwaddr addr, char *hart_config,
>
>      for (i = 0; i < plic->num_addrs; i++) {
>          int cpu_num = plic->addr_config[i].hartid;
> -        CPUState *cpu = qemu_get_cpu(hartid_base + cpu_num);
> +        CPUState *cpu = qemu_get_cpu(cpu_num);
>
>          if (plic->addr_config[i].mode == PLICMode_M) {
> -            qdev_connect_gpio_out(dev, num_harts + cpu_num,
> +            qdev_connect_gpio_out(dev, cpu_num,
>                                    qdev_get_gpio_in(DEVICE(cpu), IRQ_M_EXT));
>          }
>          if (plic->addr_config[i].mode == PLICMode_S) {
> --
> 2.25.1
>
>


  reply	other threads:[~2022-07-25  1:16 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-23  9:03 [PATCH] hw/intc: sifive_plic: Fix multi-socket plic configuraiton Atish Patra
2022-07-25  1:14 ` Alistair Francis [this message]
2022-07-25 22:30   ` Atish Kumar Patra
2022-07-27  7:38     ` Alistair Francis
2022-07-27 12:23 ` Alistair Francis
2022-07-27 19:01   ` Atish Kumar Patra

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