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Iglesias" , Alistair Francis , Peter Maydell , Jason Wang , Palmer Dabbelt , qemu-arm@nongnu.org, qemu-devel@nongnu.org, qemu-riscv@nongnu.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::52e; envelope-from=alistair23@gmail.com; helo=mail-ed1-x52e.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Sun, Oct 5, 2025 at 6:03=E2=80=AFAM Guenter Roeck w= rote: > > PCS needs to be enabled for SGMII to be supported by the Linux kernel. > > Signed-off-by: Guenter Roeck Acked-by: Alistair Francis Alistair > --- > hw/riscv/microchip_pfsoc.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c > index 6e2a6e721b..5d3007e8d3 100644 > --- a/hw/riscv/microchip_pfsoc.c > +++ b/hw/riscv/microchip_pfsoc.c > @@ -415,6 +415,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *= dev, Error **errp) > object_property_set_int(OBJECT(&s->gem0), "revision", GEM_REVISION, = errp); > object_property_set_int(OBJECT(&s->gem0), "phy-addr", 8, errp); > object_property_set_bool(OBJECT(&s->gem0), "phy-connected", false, e= rrp); > + object_property_set_bool(OBJECT(&s->gem0), "pcs-enabled", true, errp= ); > > sysbus_realize(SYS_BUS_DEVICE(&s->gem0), errp); > sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem0), 0, > @@ -426,6 +427,7 @@ static void microchip_pfsoc_soc_realize(DeviceState *= dev, Error **errp) > object_property_set_int(OBJECT(&s->gem1), "phy-addr", 9, errp); > object_property_set_link(OBJECT(&s->gem1), "phy-consumer", > OBJECT(&s->gem0), errp); > + object_property_set_bool(OBJECT(&s->gem1), "pcs-enabled", true, errp= ); > sysbus_realize(SYS_BUS_DEVICE(&s->gem1), errp); > sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem1), 0, > memmap[MICROCHIP_PFSOC_GEM1].base); > -- > 2.45.2 > >