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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2607:f8b0:4864:20::c2b; envelope-from=alistair23@gmail.com; helo=mail-oo1-xc2b.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Wed, Jan 24, 2024 at 2:18=E2=80=AFAM Daniel Henrique Barboza wrote: > > vregs[] have variable size that depends on the current vlenb set by the > host, meaning we can't use our regular kvm_riscv_reg_id() to retrieve > it. > > Create a generic kvm_encode_reg_size_id() helper to encode any given > size in bytes into a given kvm reg id. kvm_riscv_vector_reg_id() will > use it to encode vlenb into a given vreg ID. > > kvm_riscv_(get|set)_vector() can then get/set all 32 vregs. > > Signed-off-by: Daniel Henrique Barboza Acked-by: Alistair Francis Alistair > --- > target/riscv/kvm/kvm-cpu.c | 57 ++++++++++++++++++++++++++++++++++++-- > 1 file changed, 55 insertions(+), 2 deletions(-) > > diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c > index 3812481971..a7881de7f9 100644 > --- a/target/riscv/kvm/kvm-cpu.c > +++ b/target/riscv/kvm/kvm-cpu.c > @@ -86,6 +86,27 @@ static uint64_t kvm_riscv_reg_id_u64(uint64_t type, ui= nt64_t idx) > return KVM_REG_RISCV | KVM_REG_SIZE_U64 | type | idx; > } > > +static uint64_t kvm_encode_reg_size_id(uint64_t id, size_t size_b) > +{ > + uint64_t size_ctz =3D __builtin_ctz(size_b); > + > + return id | (size_ctz << KVM_REG_SIZE_SHIFT); > +} > + > +static uint64_t kvm_riscv_vector_reg_id(RISCVCPU *cpu, > + uint64_t idx) > +{ > + uint64_t id; > + size_t size_b; > + > + g_assert(idx < 32); > + > + id =3D KVM_REG_RISCV | KVM_REG_RISCV_VECTOR | KVM_REG_RISCV_VECTOR_R= EG(idx); > + size_b =3D cpu->cfg.vlenb; > + > + return kvm_encode_reg_size_id(id, size_b); > +} > + > #define RISCV_CORE_REG(env, name) \ > kvm_riscv_reg_id_ulong(env, KVM_REG_RISCV_CORE, \ > KVM_REG_RISCV_CORE_REG(name)) > @@ -694,7 +715,8 @@ static int kvm_riscv_get_regs_vector(CPUState *cs) > RISCVCPU *cpu =3D RISCV_CPU(cs); > CPURISCVState *env =3D &cpu->env; > target_ulong reg; > - int ret =3D 0; > + uint64_t vreg_id; > + int vreg_idx, ret =3D 0; > > if (!riscv_has_ext(env, RVV)) { > return 0; > @@ -724,6 +746,21 @@ static int kvm_riscv_get_regs_vector(CPUState *cs) > return ret; > } > cpu->cfg.vlenb =3D reg; > + > + for (int i =3D 0; i < 32; i++) { > + /* > + * vreg[] is statically allocated using RV_VLEN_MAX. > + * Use it instead of vlenb to calculate vreg_idx for > + * simplicity. > + */ > + vreg_idx =3D i * RV_VLEN_MAX / 64; > + vreg_id =3D kvm_riscv_vector_reg_id(cpu, i); > + > + ret =3D kvm_get_one_reg(cs, vreg_id, &env->vreg[vreg_idx]); > + if (ret) { > + return ret; > + } > + } > } > > return 0; > @@ -734,7 +771,8 @@ static int kvm_riscv_put_regs_vector(CPUState *cs) > RISCVCPU *cpu =3D RISCV_CPU(cs); > CPURISCVState *env =3D &cpu->env; > target_ulong reg; > - int ret =3D 0; > + uint64_t vreg_id; > + int vreg_idx, ret =3D 0; > > if (!riscv_has_ext(env, RVV)) { > return 0; > @@ -761,6 +799,21 @@ static int kvm_riscv_put_regs_vector(CPUState *cs) > if (kvm_v_vlenb.supported) { > reg =3D cpu->cfg.vlenb; > ret =3D kvm_set_one_reg(cs, RISCV_VECTOR_CSR_REG(env, vlenb), &r= eg); > + > + for (int i =3D 0; i < 32; i++) { > + /* > + * vreg[] is statically allocated using RV_VLEN_MAX. > + * Use it instead of vlenb to calculate vreg_idx for > + * simplicity. > + */ > + vreg_idx =3D i * RV_VLEN_MAX / 64; > + vreg_id =3D kvm_riscv_vector_reg_id(cpu, i); > + > + ret =3D kvm_set_one_reg(cs, vreg_id, &env->vreg[vreg_idx]); > + if (ret) { > + return ret; > + } > + } > } > > return ret; > -- > 2.43.0 > >