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From: Alistair Francis <alistair.francis@xilinx.com>
To: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Cc: Edgar Iglesias <edgar.iglesias@xilinx.com>,
	Peter Maydell <peter.maydell@linaro.org>,
	zach.pfeffer@xilinx.com, Ryota Ozaki <ozaki.ryota@gmail.com>,
	"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
	Alistair Francis <alistair.francis@xilinx.com>,
	michals@xilinx.com
Subject: Re: [Qemu-devel] [PATCH target-arm v1 04/15] arm: xlnx-zynq-mp: Add GIC
Date: Fri, 27 Feb 2015 11:59:34 +1000	[thread overview]
Message-ID: <CAKmqyKOPuBTP9uZSpuUB0qAuFQs4GTH_dLq5+Dcf_vJ46cbs+g@mail.gmail.com> (raw)
In-Reply-To: <8ed49fe3d2512fadfc5d9240a09c3d263dd40c64.1424731203.git.peter.crosthwaite@xilinx.com>

On Tue, Feb 24, 2015 at 9:04 AM, Peter Crosthwaite
<peter.crosthwaite@xilinx.com> wrote:
> And connect IRQ outputs to the CPUs.
>
> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>

Thanks,

Alistair

> ---
>  hw/arm/xlnx-zynq-mp.c         | 19 +++++++++++++++++++
>  include/hw/arm/xlnx-zynq-mp.h |  2 ++
>  2 files changed, 21 insertions(+)
>
> diff --git a/hw/arm/xlnx-zynq-mp.c b/hw/arm/xlnx-zynq-mp.c
> index d553fb0..9cdff13 100644
> --- a/hw/arm/xlnx-zynq-mp.c
> +++ b/hw/arm/xlnx-zynq-mp.c
> @@ -17,6 +17,11 @@
>
>  #include "hw/arm/xlnx-zynq-mp.h"
>
> +#define GIC_NUM_SPI_INTR 128
> +
> +#define GIC_DIST_ADDR       0xf9010000
> +#define GIC_CPU_ADDR        0xf9020000
> +
>  static void xlnx_zynq_mp_init(Object *obj)
>  {
>      XlnxZynqMPState *s = XLNX_ZYNQ_MP(obj);
> @@ -27,6 +32,9 @@ static void xlnx_zynq_mp_init(Object *obj)
>                            "cortex-a53-" TYPE_ARM_CPU);
>          object_property_add_child(obj, "cpu", OBJECT(&s->cpu[i]), NULL);
>      }
> +
> +    object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC);
> +    qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default());
>  }
>
>  #define ERR_PROP_CHECK_RETURN(err, errp) do { \
> @@ -42,9 +50,20 @@ static void xlnx_zynq_mp_realize(DeviceState *dev, Error **errp)
>      uint8_t i;
>      Error *err = NULL;
>
> +    qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32);
> +    qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2);
> +    qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", XLNX_ZYNQ_MP_NUM_CPUS);
> +    object_property_set_bool(OBJECT(&s->gic), true, "realized", &err);
> +    ERR_PROP_CHECK_RETURN(err, errp);
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 0, GIC_DIST_ADDR);
> +    sysbus_mmio_map(SYS_BUS_DEVICE(&s->gic), 1, GIC_CPU_ADDR);
> +
>      for (i = 0; i < XLNX_ZYNQ_MP_NUM_CPUS; i++) {
>          object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err);
>          ERR_PROP_CHECK_RETURN(err, errp);
> +
> +        sysbus_connect_irq(SYS_BUS_DEVICE(&s->gic), i,
> +                           qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_IRQ));
>      }
>  }
>
> diff --git a/include/hw/arm/xlnx-zynq-mp.h b/include/hw/arm/xlnx-zynq-mp.h
> index f7410dc..22b2af0 100644
> --- a/include/hw/arm/xlnx-zynq-mp.h
> +++ b/include/hw/arm/xlnx-zynq-mp.h
> @@ -2,6 +2,7 @@
>
>  #include "qemu-common.h"
>  #include "hw/arm/arm.h"
> +#include "hw/intc/arm_gic.h"
>
>  #define TYPE_XLNX_ZYNQ_MP "xlnx,zynq-mp"
>  #define XLNX_ZYNQ_MP(obj) OBJECT_CHECK(XlnxZynqMPState, (obj), \
> @@ -15,6 +16,7 @@ typedef struct XlnxZynqMPState {
>      /*< public >*/
>
>      ARMCPU cpu[XLNX_ZYNQ_MP_NUM_CPUS];
> +    GICState gic;
>  }  XlnxZynqMPState;
>
>  #define XLNX_ZYNQ_MP_H_
> --
> 2.3.0.1.g27a12f1
>
>

  reply	other threads:[~2015-02-27  2:00 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-23 23:04 [Qemu-devel] [PATCH target-arm v1 00/15] Next Generation Xilinx Zynq SoC Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 01/15] target-arm: cpu64: Factor out ARM cortex init Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 02/15] target-arm: cpu64: Add support for cortex-a53 Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 03/15] arm: Introduce Xilinx Zynq MPSoC Peter Crosthwaite
2015-02-24 20:06   ` Michal Simek
2015-03-02 22:32     ` Peter Crosthwaite
2015-02-27  1:50   ` Alistair Francis
2015-03-02 20:08     ` Peter Crosthwaite
2015-03-02 22:31       ` Alistair Francis
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 04/15] arm: xlnx-zynq-mp: Add GIC Peter Crosthwaite
2015-02-27  1:59   ` Alistair Francis [this message]
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 05/15] arm: xlnx-zynq-mp: Connect CPU Timers to GIC Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 06/15] net: cadence_gem: Clean up variable names Peter Crosthwaite
2015-02-26  7:15   ` Alistair Francis
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 07/15] net: cadence_gem: Split state struct and type into header Peter Crosthwaite
2015-02-27  3:12   ` Alistair Francis
2015-03-02 22:24     ` Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 08/15] arm: xilinx-zynq-mp: Add GEM support Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 09/15] char: cadence_uart: Clean up variable names Peter Crosthwaite
2015-02-27  3:22   ` Alistair Francis
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 10/15] char: cadence_uart: Split state struct and type into header Peter Crosthwaite
2015-02-27  3:26   ` Alistair Francis
2015-03-02 22:27     ` Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 11/15] arm: xilinx-zynq-mp: Add UART support Peter Crosthwaite
2015-02-27  3:43   ` Alistair Francis
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 12/15] arm: Add xilinx-zynq-mp-generic machine Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 13/15] arm: xilinx-zynq-mp-generic: Add external RAM Peter Crosthwaite
2015-02-24  2:24   ` Alistair Francis
2015-03-02 19:40     ` Peter Crosthwaite
2015-03-02 22:38       ` Alistair Francis
2015-03-02 22:59         ` Peter Crosthwaite
2015-03-02 23:20           ` Alistair Francis
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 14/15] arm: xilinx-zynq-mp-generic: Add bootloading Peter Crosthwaite
2015-02-23 23:04 ` [Qemu-devel] [PATCH target-arm v1 15/15] arm: xlnx-zynq-mp: Add PSCI setup Peter Crosthwaite
2015-02-26  7:04   ` Alistair Francis
2015-03-02 19:56     ` Peter Crosthwaite
2015-02-27  3:38 ` [Qemu-devel] [PATCH target-arm v1 00/15] Next Generation Xilinx Zynq SoC Alistair Francis
2015-03-02 20:06   ` Peter Crosthwaite
2015-03-02 22:53     ` Alistair Francis
2015-03-02 23:05       ` Peter Crosthwaite
2015-03-02 23:22         ` Alistair Francis

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