From: Alistair Francis <alistair23@gmail.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org, Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Weiwei Li <liweiwei@iscas.ac.cn>,
Bin Meng <bin.meng@windriver.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
qemu-riscv@nongnu.org,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Subject: Re: [PATCH 5/5] hw/riscv/opentitan: Correct OpenTitanState parent type/size
Date: Thu, 25 May 2023 12:20:08 +1000 [thread overview]
Message-ID: <CAKmqyKOSXWZm394M16CFEqFiQFo=+D5xEmwhorP=sCuohfoDMg@mail.gmail.com> (raw)
In-Reply-To: <20230520054510.68822-6-philmd@linaro.org>
On Sat, May 20, 2023 at 3:47 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> OpenTitanState is the 'machine' (or 'board') state: it isn't
> a SysBus device, but inherits from the MachineState type.
> Correct the instance size.
> Doing so we avoid leaking an OpenTitanState pointer in
> opentitan_machine_init().
>
> Fixes: fe0fe4735e ("riscv: Initial commit of OpenTitan machine")
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> include/hw/riscv/opentitan.h | 3 ++-
> hw/riscv/opentitan.c | 3 ++-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/include/hw/riscv/opentitan.h b/include/hw/riscv/opentitan.h
> index 806ff73528..609473d07b 100644
> --- a/include/hw/riscv/opentitan.h
> +++ b/include/hw/riscv/opentitan.h
> @@ -55,10 +55,11 @@ struct LowRISCIbexSoCState {
> };
>
> #define TYPE_OPENTITAN_MACHINE MACHINE_TYPE_NAME("opentitan")
> +OBJECT_DECLARE_SIMPLE_TYPE(OpenTitanState, OPENTITAN_MACHINE)
>
> typedef struct OpenTitanState {
> /*< private >*/
> - SysBusDevice parent_obj;
> + MachineState parent_obj;
>
> /*< public >*/
> LowRISCIbexSoCState soc;
> diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
> index 9535308197..6a2fcc4ade 100644
> --- a/hw/riscv/opentitan.c
> +++ b/hw/riscv/opentitan.c
> @@ -78,8 +78,8 @@ static const MemMapEntry ibex_memmap[] = {
> static void opentitan_machine_init(MachineState *machine)
> {
> MachineClass *mc = MACHINE_GET_CLASS(machine);
> + OpenTitanState *s = OPENTITAN_MACHINE(machine);
> const MemMapEntry *memmap = ibex_memmap;
> - OpenTitanState *s = g_new0(OpenTitanState, 1);
> MemoryRegion *sys_mem = get_system_memory();
>
> if (machine->ram_size != mc->default_ram_size) {
> @@ -330,6 +330,7 @@ static const TypeInfo open_titan_types[] = {
> }, {
> .name = TYPE_OPENTITAN_MACHINE,
> .parent = TYPE_MACHINE,
> + .instance_size = sizeof(OpenTitanState),
> .class_init = opentitan_machine_class_init,
> }
> };
> --
> 2.38.1
>
>
next prev parent reply other threads:[~2023-05-25 2:21 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-20 5:45 [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState Philippe Mathieu-Daudé
2023-05-20 5:45 ` [PATCH 1/5] hw/riscv/opentitan: Rename machine_[class]_init() functions Philippe Mathieu-Daudé
2023-05-22 13:21 ` Daniel Henrique Barboza
2023-05-25 2:13 ` Alistair Francis
2023-05-20 5:45 ` [PATCH 2/5] hw/riscv/opentitan: Declare QOM types using DEFINE_TYPES() macro Philippe Mathieu-Daudé
2023-05-22 13:26 ` Daniel Henrique Barboza
2023-05-25 2:15 ` Alistair Francis
2023-05-20 5:45 ` [PATCH 3/5] hw/riscv/opentitan: Add TYPE_OPENTITAN_MACHINE definition Philippe Mathieu-Daudé
2023-05-22 13:26 ` Daniel Henrique Barboza
2023-05-25 2:16 ` Alistair Francis
2023-05-20 5:45 ` [PATCH 4/5] hw/riscv/opentitan: Explicit machine type definition Philippe Mathieu-Daudé
2023-05-22 13:26 ` Daniel Henrique Barboza
2023-05-25 2:18 ` Alistair Francis
2023-05-20 5:45 ` [PATCH 5/5] hw/riscv/opentitan: Correct OpenTitanState parent type/size Philippe Mathieu-Daudé
2023-05-22 13:27 ` Daniel Henrique Barboza
2023-05-25 2:20 ` Alistair Francis [this message]
2023-05-25 2:21 ` [PATCH 0/5] hw/riscv/opentitan: Correct QOM type/size of OpenTitanState Alistair Francis
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