qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Alistair Francis <alistair23@gmail.com>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org,
	alistair.francis@wdc.com,  bmeng@tinylab.org,
	liweiwei@iscas.ac.cn, zhiwei_liu@linux.alibaba.com,
	 palmer@rivosinc.com
Subject: Re: [PATCH v2 3/6] target/riscv/kvm: add zicntr reg
Date: Mon, 23 Oct 2023 12:55:49 +1000	[thread overview]
Message-ID: <CAKmqyKOTnLWP71Ly5UCY2AjL3+mWTSbHSjxcD9C2oQX1kthKkg@mail.gmail.com> (raw)
In-Reply-To: <20231017221226.136764-4-dbarboza@ventanamicro.com>

On Wed, Oct 18, 2023 at 8:13 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Add zicntr support in the KVM driver now that QEMU supports it.
>
> This reg was added in Linux 6.6.
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/kvm/kvm-cpu.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target/riscv/kvm/kvm-cpu.c b/target/riscv/kvm/kvm-cpu.c
> index 5695f2face..6c2a92d171 100644
> --- a/target/riscv/kvm/kvm-cpu.c
> +++ b/target/riscv/kvm/kvm-cpu.c
> @@ -215,6 +215,7 @@ static void kvm_riscv_update_cpu_misa_ext(RISCVCPU *cpu, CPUState *cs)
>  static KVMCPUConfig kvm_multi_ext_cfgs[] = {
>      KVM_EXT_CFG("zicbom", ext_zicbom, KVM_RISCV_ISA_EXT_ZICBOM),
>      KVM_EXT_CFG("zicboz", ext_zicboz, KVM_RISCV_ISA_EXT_ZICBOZ),
> +    KVM_EXT_CFG("zicntr", ext_zicntr, KVM_RISCV_ISA_EXT_ZICNTR),
>      KVM_EXT_CFG("zihintpause", ext_zihintpause, KVM_RISCV_ISA_EXT_ZIHINTPAUSE),
>      KVM_EXT_CFG("zbb", ext_zbb, KVM_RISCV_ISA_EXT_ZBB),
>      KVM_EXT_CFG("ssaia", ext_ssaia, KVM_RISCV_ISA_EXT_SSAIA),
> --
> 2.41.0
>
>


  reply	other threads:[~2023-10-23  2:56 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-17 22:12 [PATCH v2 0/6] riscv: zicntr/zihpm flags and disable support Daniel Henrique Barboza
2023-10-17 22:12 ` [PATCH v2 1/6] target/riscv/cpu.c: add zicntr extension flag Daniel Henrique Barboza
2023-10-17 22:12 ` [PATCH v2 2/6] target/riscv/tcg: add ext_zicntr disable support Daniel Henrique Barboza
2023-10-23  2:54   ` Alistair Francis
2023-10-23 11:52     ` Daniel Henrique Barboza
2023-10-17 22:12 ` [PATCH v2 3/6] target/riscv/kvm: add zicntr reg Daniel Henrique Barboza
2023-10-23  2:55   ` Alistair Francis [this message]
2023-10-17 22:12 ` [PATCH v2 4/6] target/riscv/cpu.c: add zihpm extension flag Daniel Henrique Barboza
2023-10-23  3:38   ` Alistair Francis
2023-10-17 22:12 ` [PATCH v2 5/6] target/riscv/tcg: add ext_zihpm disable support Daniel Henrique Barboza
2023-10-17 22:12 ` [PATCH v2 6/6] target/riscv/kvm: add zihpm reg Daniel Henrique Barboza
2023-10-23  3:38   ` Alistair Francis

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAKmqyKOTnLWP71Ly5UCY2AjL3+mWTSbHSjxcD9C2oQX1kthKkg@mail.gmail.com \
    --to=alistair23@gmail.com \
    --cc=alistair.francis@wdc.com \
    --cc=bmeng@tinylab.org \
    --cc=dbarboza@ventanamicro.com \
    --cc=liweiwei@iscas.ac.cn \
    --cc=palmer@rivosinc.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=zhiwei_liu@linux.alibaba.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).