From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36032) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuUHA-0001fH-ES for qemu-devel@nongnu.org; Mon, 18 May 2015 19:16:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YuUH9-0002tM-38 for qemu-devel@nongnu.org; Mon, 18 May 2015 19:16:48 -0400 Received: from mail-ob0-x234.google.com ([2607:f8b0:4003:c01::234]:33001) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YuUH8-0002tA-TR for qemu-devel@nongnu.org; Mon, 18 May 2015 19:16:47 -0400 Received: by obblk2 with SMTP id lk2so144220519obb.0 for ; Mon, 18 May 2015 16:16:46 -0700 (PDT) MIME-Version: 1.0 Sender: alistair23@gmail.com In-Reply-To: References: From: Alistair Francis Date: Tue, 19 May 2015 09:16:15 +1000 Message-ID: Content-Type: text/plain; charset=ISO-8859-1 Subject: Re: [Qemu-devel] [PATCH RESEND v1 0/5] Add Microblaze configuration options List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alistair Francis Cc: Peter Maydell , Peter Crosthwaite , Richard Henderson , "qemu-devel@nongnu.org Developers" , =?ISO-8859-1?Q?Andreas_F=E4rber?= On Tue, May 19, 2015 at 9:11 AM, Alistair Francis wrote: > Firstly this patch series tidies up some code and removes > a "xlnx." prefix. > Sorry about the spam. Not all of the emails went through the first time, so I swapped SMTP servers and am re-sending. Thanks, Alistair > Then it moves the Microblaze PVR registers to the end > of the CPUMBState to preserve them during reset. This > allows most of the operations on them to be moved from > the reset to the realise. Except for the machine specific > ones which will be moved when the other properties are > converted across to standard QEMU props, after this patch > series is accepted (either merged or the method I'm using > is approved). See the individual commit for more details. > > Next it adds the "use-stack-protection" property > to the Microblaze CPU, which allows stack protection to be > disabled. > > It also converts the previously hardcoded method of enabling > the FPU to use standard QEMU properties. This simplifies the > logic in the target-microblaze translate.c. > > Changes since RFC: > - Preserve the PVR registers during resets > - Move most of the logic into realise functions > - Small name and function changes > > > Alistair Francis (5): > target-microblaze: Fix up indentation > target-microblaze: Preserve the pvr registers during reset > target-microblaze: Allow the stack protection to be disabled > target-microblaze: Tidy up the base-vectors property > target-microblaze: Convert use-fpu to a CPU property > > hw/microblaze/petalogix_ml605_mmu.c | 4 +- > target-microblaze/cpu-qom.h | 9 +++++- > target-microblaze/cpu.c | 59 ++++++++++++++++++++++------------- > target-microblaze/cpu.h | 11 ++++-- > target-microblaze/helper.c | 8 ++-- > target-microblaze/op_helper.c | 10 +++--- > target-microblaze/translate.c | 8 ++-- > 7 files changed, 67 insertions(+), 42 deletions(-) >