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Thu, 12 Mar 2026 18:10:23 -0700 (PDT) MIME-Version: 1.0 References: <20260306071105.3328365-1-max.chou@sifive.com> In-Reply-To: From: Alistair Francis Date: Fri, 13 Mar 2026 11:09:57 +1000 X-Gm-Features: AaiRm523wM1r-OhNPSQ74cjxIWyPTv_UC1KZkjqrP-wTe5dmdrBKkKMdD6URSe4 Message-ID: Subject: Re: [PATCH v5 0/9] Add Zvfbfa extension support To: Max Chou Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Chao Liu Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=alistair23@gmail.com; helo=mail-ed1-x536.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, Mar 12, 2026 at 9:16=E2=80=AFPM Max Chou wrot= e: > > On 2026-03-09 14:51, Alistair Francis wrote: > > On Fri, Mar 6, 2026 at 5:13=E2=80=AFPM Max Chou w= rote: > > > > > > This patch series adds support for the RISC-V Zvfbfa extension, which > > > provides additional BF16 vector compute support. > > > > > > The isa spec of Zvfbfa extension is not ratified yet, so this patch > > > series is based on the latest draft of the spec (v0.1) and make the > > > Zvfbfa extension as an experimental extension. > > > > It's not only not ratified, there isn't even a draft spec. A personal > > GitHub repo without any tags or releases is not enough for us to take > > this unfortunately. > > > > > > > > The Zvfbfa extension adds a 1-bit field, altfmt, to the vtype CSR in > > > bit position 8. > > > The Zvfbfa extension requires the Zve32f and Zfbfmin extensions. > > > > > > Specification: > > > https://github.com/aswaterman/riscv-misc/blob/main/isa/zvfbfa.adoc > > > > Overall this looks ok. Once a draft spec is released we can apply it > > > > Alistair > > > > Hi Alistair, > > Thanks for the review. You asked for a pointer to the standalone ISA > spec repo for Zvfbfa =E2=80=94 I want to explain why that doesn=E2=80=99t= exist and > where the spec lives instead. > > RVIA changed the ISA development workflow: new ISA specifications are > no longer developed in standalone repositories. Instead, they are > developed as forked branches of the base ISA manual repo > (riscv/riscv-isa-manual) and merged into it upon ratification [1]. That's fine. The details you point to show forking to a RISC-V org GitHub account. In which case it's still clearly a RISC-V spec, under RVI. As long as it's tagged for draft releases that isn't really any different then before. > > For Zvfbfa specifically, the official spec artifact under this new > workflow is a PR against riscv-isa-manual [2], incorporating the spec > text [3]. The PR notes that the spec has passed internal review and > ARC review, as documented in the tech-unprivileged list thread [4]. The problem here is that there is no version control. If we merge this series and the PR changes then suddenly we are out of sync there is no way to track which version of the draft spec we support. We need clear versions, like we previously have. For example version 0.7 and then 0.8. Draft versions are ok, but we need a stable target to develop against. > > PR #2743 is currently open, meaning ratification is pending but not > yet complete. Under the new workflow, merge into main of > riscv-isa-manual is the signal that ratification is finalized. If you > prefer to wait until that merge happens before applying this patchset, > I completely understand. Alternatively, if you are comfortable > accepting it as ratification-pending, I am happy to address any > remaining technical comments. In this case we will have to wait as there is no stable version of the spec to point to. Alistair > > Please let me know how you would like to proceed. > > References: > [1] https://lists.riscv.org/g/sig-documentation/message/275 > [2] https://github.com/riscv/riscv-isa-manual/pull/2743 > [3] https://github.com/aswaterman/riscv-misc/blob/main/isa/zvfbfa.adoc > [4] https://lists.riscv.org/g/tech-unprivileged/message/1031 > https://lists.riscv.org/g/tech-unprivileged/message/1085 > https://lists.riscv.org/g/tech-unprivileged/message/1109 > > Best regards, > rnax >