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Fri, 08 Jan 2021 15:32:46 -0800 (PST) MIME-Version: 1.0 References: <20210108224256.2321-1-alex.bennee@linaro.org> <20210108224256.2321-18-alex.bennee@linaro.org> In-Reply-To: <20210108224256.2321-18-alex.bennee@linaro.org> From: Alistair Francis Date: Fri, 8 Jan 2021 15:32:20 -0800 Message-ID: Subject: Re: [PATCH v1 17/20] riscv: Add semihosting support for user mode To: =?UTF-8?B?QWxleCBCZW5uw6ll?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2607:f8b0:4864:20::131; envelope-from=alistair23@gmail.com; helo=mail-il1-x131.google.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Keith Packard , Kito Cheng , "qemu-devel@nongnu.org Developers" , Laurent Vivier Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Fri, Jan 8, 2021 at 3:05 PM Alex Benn=C3=A9e wr= ote: > > From: Kito Cheng > > This could made testing more easier and ARM/AArch64 has supported on > their linux user mode too, so I think it should be reasonable. > > Verified GCC testsuite with newlib/semihosting. > > Signed-off-by: Kito Cheng > Reviewed-by: Keith Packard > Message-Id: <20210107170717.2098982-7-keithp@keithp.com> > Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Alistair Francis Alistair > --- > linux-user/riscv/cpu_loop.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/linux-user/riscv/cpu_loop.c b/linux-user/riscv/cpu_loop.c > index aa9e437875..9665dabb09 100644 > --- a/linux-user/riscv/cpu_loop.c > +++ b/linux-user/riscv/cpu_loop.c > @@ -23,6 +23,7 @@ > #include "qemu.h" > #include "cpu_loop-common.h" > #include "elf.h" > +#include "hw/semihosting/common-semi.h" > > void cpu_loop(CPURISCVState *env) > { > @@ -91,6 +92,10 @@ void cpu_loop(CPURISCVState *env) > sigcode =3D TARGET_SEGV_MAPERR; > sigaddr =3D env->badaddr; > break; > + case RISCV_EXCP_SEMIHOST: > + env->gpr[xA0] =3D do_common_semihosting(cs); > + env->pc +=3D 4; > + break; > case EXCP_DEBUG: > gdbstep: > signum =3D TARGET_SIGTRAP; > -- > 2.20.1 > >